Sekhar Nori b39639b820 davinci: clock: add support for setting sysclk rate
Setting sysclk rate will be useful in cases where the
sysclk is not at a fixed ratio to the PLL output but
can asynchronously be changed.

This support forms the basis of attempt to keep the AEMIF
clock constant on OMAP-L138 even as PLL0 output changes
as ARM clock is changed to save power.

This patch has been tested on OMAP-L138.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-09-24 07:40:24 -07:00
..
2010-02-25 22:09:41 +00:00
2010-07-31 14:20:02 +01:00
2010-09-09 22:49:26 +01:00