f13980e408
Document the device tree binding for the pin controllers found on the Armada 37xx SoCs. Update the binding documention of the xtal clk which is a subnode of this syscon node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> [Fixed gpios node] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
30 lines
924 B
Plaintext
30 lines
924 B
Plaintext
* Xtal Clock bindings for Marvell Armada 37xx SoCs
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Marvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
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reading the gpio latch register.
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This node must be a subnode of the node exposing the register address
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of the GPIO block where the gpio latch is located.
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See Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
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Required properties:
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- compatible : shall be one of the following:
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"marvell,armada-3700-xtal-clock"
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- #clock-cells : from common clock binding; shall be set to 0
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Optional properties:
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- clock-output-names : from common clock binding; allows overwrite default clock
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output names ("xtal")
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Example:
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pinctrl_nb: pinctrl-nb@13800 {
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compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd";
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reg = <0x13800 0x100>, <0x13C00 0x20>;
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xtalclk: xtal-clk {
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compatible = "marvell,armada-3700-xtal-clock";
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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};
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