21faaea134
The I2S controller in the A83T is mostly compatible with the one found in earlier SoCs such as the A20 and A31. While the documents publicly available for the A83T do not cover this hardware, the officially released BSP kernel does have register definitions for it. These were matched against the A20 user manual. The only difference is the TX FIFO and interrupt status registers have been swapped around, like what we have seen with the SPDIF controller. This patch adds support for this hardware. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
44 lines
1.4 KiB
Plaintext
44 lines
1.4 KiB
Plaintext
* Allwinner A10 I2S controller
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The I2S bus (Inter-IC sound bus) is a serial link for digital
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audio data transfer between devices in the system.
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Required properties:
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- compatible: should be one of the following:
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- "allwinner,sun4i-a10-i2s"
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- "allwinner,sun6i-a31-i2s"
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- "allwinner,sun8i-a83t-i2s"
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- "allwinner,sun8i-h3-i2s"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: should contain the I2S interrupt.
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- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should include "tx" and "rx".
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- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
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- clock-names: should contain the following:
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- "apb" : clock for the I2S bus interface
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- "mod" : module clock for the I2S controller
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- #sound-dai-cells : Must be equal to 0
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Required properties for the following compatibles:
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- "allwinner,sun6i-a31-i2s"
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- "allwinner,sun8i-a83t-i2s"
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- "allwinner,sun8i-h3-i2s"
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- resets: phandle to the reset line for this codec
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Example:
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i2s0: i2s@1c22400 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun4i-a10-i2s";
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reg = <0x01c22400 0x400>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&apb0_gates 3>, <&i2s0_clk>;
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clock-names = "apb", "mod";
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dmas = <&dma SUN4I_DMA_NORMAL 3>,
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<&dma SUN4I_DMA_NORMAL 3>;
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dma-names = "rx", "tx";
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};
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