linux

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Andre Przywara b5d84ff600 arm/arm64: KVM: enable kernel side of GICv3 emulation

With all the necessary GICv3 emulation code in place, we can now
connect the code to the GICv3 backend in the kernel.
The LR register handling is different depending on the emulated GIC
model, so provide different implementations for each.
Also allow non-v2-compatible GICv3 implementations (which don't
provide MMIO regions for the virtual CPU interface in the DT), but
restrict those hosts to support GICv3 guests only.
If the device tree provides a GICv2 compatible GICV resource entry,
but that one is faulty, just disable the GICv2 emulation and let the
user use at least the GICv3 emulation for guests.
To provide proper support for the legacy KVM_CREATE_IRQCHIP ioctl,
note virtual GICv2 compatibility in struct vgic_params and use it
on creating a VGICv2.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>

2015-01-20 18:25:32 +01:00

arm

arm/arm64: KVM: enable kernel side of GICv3 emulation

2015-01-20 18:25:32 +01:00

async_pf.c

kvm: Faults which trigger IO release the mmap_sem

2014-09-24 14:07:54 +02:00

async_pf.h

KVM: Halt vcpu if page it tries to access is swapped out

2011-01-12 11:21:39 +02:00

coalesced_mmio.c

KVM: return an error code in kvm_vm_ioctl_register_coalesced_mmio()