Dave Carroll b6554cfe09 scsi: aacraid: Insure we don't access PCIe space during AER/EEH
There are a few windows during AER/EEH when we can access PCIe I/O mapped
registers. This will harden the access to insure we do not allow PCIe
access during errors

Signed-off-by: Dave Carroll <david.carroll@microsemi.com>
Reviewed-by: Sagar Biradar <sagar.biradar@microchip.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-03-25 22:19:01 -04:00
..
2019-03-16 12:51:50 -07:00
2017-02-03 10:35:04 -05:00
2017-02-03 10:35:04 -05:00