Jayachandran C b66f953cd0 MIPS: Netlogic: Avoid unnecessary cache flushes
XLR dcache is fully coherent across CPUs, so avoid unnecessary dcache
flushes.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:54 +00:00
..
2011-04-26 10:22:59 +02:00
2011-07-26 16:49:47 -07:00
2011-03-31 11:26:23 -03:00