Anton Blanchard b6d34eb4d2 powerpc: Expose TSCR via sysfs
The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.

Exposing it via sysfs allows us to tune it at run time.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-22 05:48:36 +11:00
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