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The phy needs some delay to output the stable status from low
power mode. And for OTGSC, the status inputs are debounced
using a 1 ms time constant, so, delay 2ms for controller to get
the stable status(like vbus and id) when the phy leaves low power.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
b82613cf09