b9d216fcef
Arm Neoverse-N2 and the Cortex-A710 cores are affected by a CPU erratum where the TRBE will overwrite the trace buffer in FILL mode. The TRBE doesn't stop (as expected in FILL mode) when it reaches the limit and wraps to the base to continue writing upto 3 cache lines. This will overwrite any trace that was written previously. Add the Neoverse-N2 erratum(#2139208) and Cortex-A710 erratum (#2119858) to the detection logic. This will be used by the TRBE driver in later patches to work around the issue. The detection has been kept with the core arm64 errata framework list to make sure : - We don't duplicate the framework in TRBE driver - The errata detection is advertised like the rest of the CPU errata. Note that the Kconfig entries are not fully active until the TRBE driver implements the work around. Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> cc: Leo Yan <leo.yan@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20211019163153.3692640-3-suzuki.poulose@arm.com Signed-off-by: Will Deacon <will@kernel.org>
68 lines
1.2 KiB
Plaintext
68 lines
1.2 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Internal CPU capabilities constants, keep this list sorted
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BTI
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# Unreliable: use system_supports_32bit_el0() instead.
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HAS_32BIT_EL0_DO_NOT_USE
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HAS_32BIT_EL1
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HAS_ADDRESS_AUTH
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HAS_ADDRESS_AUTH_ARCH
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HAS_ADDRESS_AUTH_IMP_DEF
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HAS_AMU_EXTN
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HAS_ARMv8_4_TTL
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HAS_CACHE_DIC
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HAS_CACHE_IDC
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HAS_CNP
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HAS_CRC32
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HAS_DCPODP
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HAS_DCPOP
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HAS_E0PD
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HAS_EPAN
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HAS_GENERIC_AUTH
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HAS_GENERIC_AUTH_ARCH
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HAS_GENERIC_AUTH_IMP_DEF
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HAS_IRQ_PRIO_MASKING
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HAS_LDAPR
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HAS_LSE_ATOMICS
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HAS_NO_FPSIMD
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HAS_NO_HW_PREFETCH
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HAS_PAN
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HAS_RAS_EXTN
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HAS_RNG
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HAS_SB
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HAS_STAGE2_FWB
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HAS_SYSREG_GIC_CPUIF
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HAS_TLB_RANGE
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HAS_VIRT_HOST_EXTN
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HW_DBM
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KVM_PROTECTED_MODE
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MISMATCHED_CACHE_TYPE
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MTE
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SPECTRE_V2
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SPECTRE_V3A
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SPECTRE_V4
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SSBS
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SVE
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UNMAP_KERNEL_AT_EL0
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WORKAROUND_834220
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WORKAROUND_843419
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WORKAROUND_845719
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WORKAROUND_858921
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WORKAROUND_1418040
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WORKAROUND_1463225
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WORKAROUND_1508412
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WORKAROUND_1542419
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WORKAROUND_TRBE_OVERWRITE_FILL_MODE
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WORKAROUND_CAVIUM_23154
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WORKAROUND_CAVIUM_27456
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WORKAROUND_CAVIUM_30115
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WORKAROUND_CAVIUM_TX2_219_PRFM
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WORKAROUND_CAVIUM_TX2_219_TVM
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WORKAROUND_CLEAN_CACHE
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WORKAROUND_DEVICE_LOAD_ACQUIRE
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WORKAROUND_NVIDIA_CARMEL_CNP
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WORKAROUND_QCOM_FALKOR_E1003
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WORKAROUND_REPEAT_TLBI
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WORKAROUND_SPECULATIVE_AT
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