Curtis Malainey ba0b3a977e
ASoC: rt5677: Set ADC clock to use PLL and enable ASRC
Use the PLL to kept the correct 24M clock rate so frequency shift does
not occur when using the DSP VAD.

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Link: https://lore.kernel.org/r/20191106011335.223061-11-cujomalainey@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-11 13:02:06 +00:00
2019-09-30 10:25:24 -07:00
2019-09-30 09:29:53 -07:00
2019-09-22 10:58:15 -07:00
2019-09-30 09:29:53 -07:00
2019-09-18 09:49:13 -07:00
2019-09-22 10:34:46 -07:00
2019-09-13 17:21:38 +03:00
2019-09-30 10:35:40 -07:00

Linux kernel
============

There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.

In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``.  The formatted documentation can also be read online at:

    https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.
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