1dd498e5e2
Cortex-A510's erratum #2077057 causes SPSR_EL2 to be corrupted when single-stepping authenticated ERET instructions. A single step is expected, but a pointer authentication trap is taken instead. The erratum causes SPSR_EL1 to be copied to SPSR_EL2, which could allow EL1 to cause a return to EL2 with a guest controlled ELR_EL2. Because the conditions require an ERET into active-not-pending state, this is only a problem for the EL2 when EL2 is stepping EL1. In this case the previous SPSR_EL2 value is preserved in struct kvm_vcpu, and can be restored. Cc: stable@vger.kernel.org # 53960faf2b73: arm64: Add Cortex-A510 CPU part definition Cc: stable@vger.kernel.org Signed-off-by: James Morse <james.morse@arm.com> [maz: fixup cpucaps ordering] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220127122052.1584324-5-james.morse@arm.com
76 lines
1.3 KiB
Plaintext
76 lines
1.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Internal CPU capabilities constants, keep this list sorted
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BTI
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# Unreliable: use system_supports_32bit_el0() instead.
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HAS_32BIT_EL0_DO_NOT_USE
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HAS_32BIT_EL1
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HAS_ADDRESS_AUTH
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HAS_ADDRESS_AUTH_ARCH
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HAS_ADDRESS_AUTH_IMP_DEF
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HAS_AMU_EXTN
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HAS_ARMv8_4_TTL
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HAS_CACHE_DIC
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HAS_CACHE_IDC
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HAS_CNP
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HAS_CRC32
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HAS_DCPODP
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HAS_DCPOP
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HAS_E0PD
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HAS_ECV
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HAS_EPAN
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HAS_GENERIC_AUTH
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HAS_GENERIC_AUTH_ARCH
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HAS_GENERIC_AUTH_IMP_DEF
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HAS_IRQ_PRIO_MASKING
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HAS_LDAPR
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HAS_LSE_ATOMICS
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HAS_NO_FPSIMD
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HAS_NO_HW_PREFETCH
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HAS_PAN
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HAS_RAS_EXTN
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HAS_RNG
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HAS_SB
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HAS_STAGE2_FWB
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HAS_SYSREG_GIC_CPUIF
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HAS_TLB_RANGE
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HAS_VIRT_HOST_EXTN
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HW_DBM
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KVM_PROTECTED_MODE
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MISMATCHED_CACHE_TYPE
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MTE
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MTE_ASYMM
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SPECTRE_V2
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SPECTRE_V3A
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SPECTRE_V4
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SSBS
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SVE
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UNMAP_KERNEL_AT_EL0
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WORKAROUND_834220
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WORKAROUND_843419
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WORKAROUND_845719
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WORKAROUND_858921
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WORKAROUND_1418040
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WORKAROUND_1463225
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WORKAROUND_1508412
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WORKAROUND_1542419
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WORKAROUND_1902691
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WORKAROUND_2038923
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WORKAROUND_2064142
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WORKAROUND_2077057
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WORKAROUND_TRBE_OVERWRITE_FILL_MODE
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WORKAROUND_TSB_FLUSH_FAILURE
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WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
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WORKAROUND_CAVIUM_23154
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WORKAROUND_CAVIUM_27456
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WORKAROUND_CAVIUM_30115
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WORKAROUND_CAVIUM_TX2_219_PRFM
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WORKAROUND_CAVIUM_TX2_219_TVM
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WORKAROUND_CLEAN_CACHE
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WORKAROUND_DEVICE_LOAD_ACQUIRE
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WORKAROUND_NVIDIA_CARMEL_CNP
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WORKAROUND_QCOM_FALKOR_E1003
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WORKAROUND_REPEAT_TLBI
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WORKAROUND_SPECULATIVE_AT
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