9dfe4828aa
Currently one resolves the location of the reserved_ttbr0 for PAN by taking a positive offset from swapper_pg_dir. In a future patch we wish to extend the swapper s.t. its size is determined at link time rather than comile time, rendering SWAPPER_DIR_SIZE unsuitable for such a low level calculation. In this patch we re-arrange the order of the linker script s.t. instead one computes reserved_ttbr0 by subtracting RESERVED_TTBR0_SIZE from swapper_pg_dir. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Steve Capper <steve.capper@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
86 lines
2.0 KiB
C
86 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_ASM_UACCESS_H
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#define __ASM_ASM_UACCESS_H
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#include <asm/alternative.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/mmu.h>
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#include <asm/sysreg.h>
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#include <asm/assembler.h>
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/*
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* User access enabling/disabling macros.
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*/
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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.macro __uaccess_ttbr0_disable, tmp1
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mrs \tmp1, ttbr1_el1 // swapper_pg_dir
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sub \tmp1, \tmp1, #RESERVED_TTBR0_SIZE // reserved_ttbr0 just before swapper_pg_dir
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msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
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isb
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add \tmp1, \tmp1, #RESERVED_TTBR0_SIZE
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bic \tmp1, \tmp1, #TTBR_ASID_MASK
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msr ttbr1_el1, \tmp1 // set reserved ASID
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isb
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.endm
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.macro __uaccess_ttbr0_enable, tmp1, tmp2
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get_thread_info \tmp1
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ldr \tmp1, [\tmp1, #TSK_TI_TTBR0] // load saved TTBR0_EL1
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mrs \tmp2, ttbr1_el1
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extr \tmp2, \tmp2, \tmp1, #48
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ror \tmp2, \tmp2, #16
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msr ttbr1_el1, \tmp2 // set the active ASID
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isb
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msr ttbr0_el1, \tmp1 // set the non-PAN TTBR0_EL1
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isb
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.endm
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.macro uaccess_ttbr0_disable, tmp1
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alternative_if_not ARM64_HAS_PAN
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__uaccess_ttbr0_disable \tmp1
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alternative_else_nop_endif
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.endm
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.macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
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alternative_if_not ARM64_HAS_PAN
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save_and_disable_irq \tmp3 // avoid preemption
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__uaccess_ttbr0_enable \tmp1, \tmp2
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restore_irq \tmp3
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alternative_else_nop_endif
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.endm
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#else
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.macro uaccess_ttbr0_disable, tmp1
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.endm
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.macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
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.endm
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#endif
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/*
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* These macros are no-ops when UAO is present.
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*/
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.macro uaccess_disable_not_uao, tmp1
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uaccess_ttbr0_disable \tmp1
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alternative_if ARM64_ALT_PAN_NOT_UAO
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SET_PSTATE_PAN(1)
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alternative_else_nop_endif
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.endm
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.macro uaccess_enable_not_uao, tmp1, tmp2, tmp3
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uaccess_ttbr0_enable \tmp1, \tmp2, \tmp3
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alternative_if ARM64_ALT_PAN_NOT_UAO
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SET_PSTATE_PAN(0)
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alternative_else_nop_endif
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.endm
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/*
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* Remove the address tag from a virtual address, if present.
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*/
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.macro clear_address_tag, dst, addr
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tst \addr, #(1 << 55)
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bic \dst, \addr, #(0xff << 56)
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csel \dst, \dst, \addr, eq
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.endm
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#endif
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