afd36e9d91
Add various clock controllers found in the MT7988 SoC to existing bindings (if applicable) and add files for the new ethwarp, mcusys and xfi-pll clock controllers not previously present in any SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/07e76a544ce4392bcb88e34d5480e99bb7994618.1702849494.git.daniel@makrotopia.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
53 lines
1.1 KiB
YAML
53 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek MT7988 ethwarp Controller
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maintainers:
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- Daniel Golle <daniel@makrotopia.org>
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description:
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The Mediatek MT7988 ethwarp controller provides clocks and resets for the
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Ethernet related subsystems found the MT7988 SoC.
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The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
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properties:
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compatible:
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items:
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- const: mediatek,mt7988-ethwarp
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/reset/ti-syscon.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@15031000 {
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compatible = "mediatek,mt7988-ethwarp";
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reg = <0 0x15031000 0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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};
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