5a2b2e1341
Currently, xvcu_pll_set_rate configures the PLL to a clock rate that is pre-calculated when probing the driver. To still make the clock framework aware of the PLL and to allow to configure other clocks based on the PLL rate, register the PLL as a fixed rate clock. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210121071659.1226489-8-m.tretter@pengutronix.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
46 lines
1.3 KiB
Plaintext
46 lines
1.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menu "Xilinx SoC drivers"
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config XILINX_VCU
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tristate "Xilinx VCU logicoreIP Init"
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depends on HAS_IOMEM && COMMON_CLK
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select REGMAP_MMIO
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help
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Provides the driver to enable and disable the isolation between the
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processing system and programmable logic part by using the logicoreIP
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register set. This driver also configures the frequency based on the
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clock information from the logicoreIP register set.
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If you say yes here you get support for the logicoreIP.
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If unsure, say N.
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To compile this driver as a module, choose M here: the
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module will be called xlnx_vcu.
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config ZYNQMP_POWER
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bool "Enable Xilinx Zynq MPSoC Power Management driver"
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depends on PM && ZYNQMP_FIRMWARE
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default y
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select MAILBOX
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select ZYNQMP_IPI_MBOX
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help
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Say yes to enable power management support for ZyqnMP SoC.
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This driver uses firmware driver as an interface for power
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management request to firmware. It registers isr to handle
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power management callbacks from firmware. It registers mailbox client
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to handle power management callbacks from firmware.
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If in doubt, say N.
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config ZYNQMP_PM_DOMAINS
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bool "Enable Zynq MPSoC generic PM domains"
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default y
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depends on PM && ZYNQMP_FIRMWARE
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select PM_GENERIC_DOMAINS
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help
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Say yes to enable device power management through PM domains
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If in doubt, say N.
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endmenu
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