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This describes in broad lines the how an AMD GPU is organized, in terms of hardware blocks. This is Alex' description from the "gpu block diagram" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71543.html Originally-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Yann Dirson <ydirson@free.fr> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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32 lines
1013 B
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.. _amdgpu-display-core:
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===================================
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drm/amd/display - Display Core (DC)
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===================================
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AMD display engine is partially shared with other operating systems; for this
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reason, our Display Core Driver is divided into two pieces:
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1. **Display Core (DC)** contains the OS-agnostic components. Things like
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hardware programming and resource management are handled here.
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2. **Display Manager (DM)** contains the OS-dependent components. Hooks to the
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amdgpu base driver and DRM are implemented here.
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The display pipe is responsible for "scanning out" a rendered frame from the
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GPU memory (also called VRAM, FrameBuffer, etc.) to a display. In other words,
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it would:
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1. Read frame information from memory;
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2. Perform required transformation;
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3. Send pixel data to sink devices.
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If you want to learn more about our driver details, take a look at the below
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table of content:
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.. toctree::
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display-manager.rst
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dc-debug.rst
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dcn-overview.rst
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dc-glossary.rst
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