dcd49679fb
With 'unevaluatedProperties' support implemented, there's several
warnings due to undocumented properties:
Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@0,0: Unevaluated properties are not allowed ('phy-names' was unexpected)
Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@1,0: Unevaluated properties are not allowed ('phy-names' was unexpected)
Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@2,0: Unevaluated properties are not allowed ('phy-names' was unexpected)
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.example.dt.yaml: pcie@11230000: Unevaluated properties are not allowed ('phy-names' was unexpected)
Documentation/devicetree/bindings/pci/microchip,pcie-host.example.dt.yaml: pcie@2030000000: Unevaluated properties are not allowed ('interrupt-controller' was unexpected)
Documentation/devicetree/bindings/pci/ti,am65-pci-ep.example.dt.yaml: pcie-ep@5500000: Unevaluated properties are not allowed ('num-ib-windows', 'num-ob-windows' were unexpected)
Documentation/devicetree/bindings/pci/ti,am65-pci-host.example.dt.yaml: pcie@5500000: Unevaluated properties are not allowed ('num-viewport', 'interrupts' were unexpected)
Documentation/devicetree/bindings/pci/ti,j721e-pci-host.example.dt.yaml: pcie@2900000: Unevaluated properties are not allowed ('dma-coherent' was unexpected)
Add the necessary property definitions or remove the properties from the
examples to fix these warnings.
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Jianjun Wang <jianjun.wang@mediatek.com>
Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Daire McNamara <daire.mcnamara@microchip.com>
Cc: Abraham I <kishon@ti.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20211206194406.2469361-1-robh@kernel.org
110 lines
2.8 KiB
YAML
110 lines
2.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip PCIe Root Port Bridge Controller Device Tree Bindings
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maintainers:
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- Daire McNamara <daire.mcnamara@microchip.com>
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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- $ref: /schemas/interrupt-controller/msi-controller.yaml#
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properties:
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compatible:
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const: microchip,pcie-host-1.0 # PolarFire
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: cfg
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- const: apb
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interrupts:
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minItems: 1
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items:
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- description: PCIe host controller
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- description: builtin MSI controller
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interrupt-names:
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minItems: 1
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items:
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- const: pcie
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- const: msi
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ranges:
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maxItems: 1
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msi-controller:
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description: Identifies the node as an MSI controller.
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msi-parent:
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description: MSI controller the device is capable of using.
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interrupt-controller:
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type: object
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properties:
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'#address-cells':
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const: 0
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'#interrupt-cells':
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const: 1
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interrupt-controller: true
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required:
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- '#address-cells'
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- '#interrupt-cells'
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- interrupt-controller
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additionalProperties: false
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required:
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- reg
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- reg-names
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- "#interrupt-cells"
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- interrupts
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- interrupt-map-mask
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- interrupt-map
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- msi-controller
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unevaluatedProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie0: pcie@2030000000 {
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compatible = "microchip,pcie-host-1.0";
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reg = <0x0 0x70000000 0x0 0x08000000>,
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<0x0 0x43000000 0x0 0x00010000>;
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reg-names = "cfg", "apb";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupts = <119>;
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <0 0 0 1 &pcie_intc0 0>,
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<0 0 0 2 &pcie_intc0 1>,
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<0 0 0 3 &pcie_intc0 2>,
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<0 0 0 4 &pcie_intc0 3>;
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interrupt-parent = <&plic0>;
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msi-parent = <&pcie0>;
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msi-controller;
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bus-range = <0x00 0x7f>;
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ranges = <0x03000000 0x0 0x78000000 0x0 0x78000000 0x0 0x04000000>;
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pcie_intc0: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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};
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};
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