d0f482bb06
This provides the configuration for the currently available evaluation boards PCB134 and PCB135. The series depends on the following series currently on its way into the kernel: - Sparx5 Reset Driver Link: https://lore.kernel.org/r/20210416084054.2922327-1-steen.hegelund@microchip.com/ Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
908 lines
21 KiB
Plaintext
908 lines
21 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
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*/
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/dts-v1/;
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#include "sparx5_pcb_common.dtsi"
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/{
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
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priority = <200>;
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};
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leds {
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compatible = "gpio-leds";
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led@0 {
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label = "twr0:green";
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gpios = <&sgpio_out0 8 0 GPIO_ACTIVE_LOW>;
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};
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led@1 {
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label = "twr0:yellow";
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gpios = <&sgpio_out0 8 1 GPIO_ACTIVE_LOW>;
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};
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led@2 {
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label = "twr1:green";
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gpios = <&sgpio_out0 9 0 GPIO_ACTIVE_LOW>;
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};
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led@3 {
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label = "twr1:yellow";
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gpios = <&sgpio_out0 9 1 GPIO_ACTIVE_LOW>;
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};
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led@4 {
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label = "twr2:green";
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gpios = <&sgpio_out0 10 0 GPIO_ACTIVE_LOW>;
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};
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led@5 {
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label = "twr2:yellow";
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gpios = <&sgpio_out0 10 1 GPIO_ACTIVE_LOW>;
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};
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led@6 {
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label = "twr3:green";
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gpios = <&sgpio_out0 11 0 GPIO_ACTIVE_LOW>;
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};
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led@7 {
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label = "twr3:yellow";
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gpios = <&sgpio_out0 11 1 GPIO_ACTIVE_LOW>;
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};
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led@8 {
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label = "eth12:green";
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gpios = <&sgpio_out0 12 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@9 {
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label = "eth12:yellow";
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gpios = <&sgpio_out0 12 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@10 {
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label = "eth13:green";
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gpios = <&sgpio_out0 13 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@11 {
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label = "eth13:yellow";
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gpios = <&sgpio_out0 13 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@12 {
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label = "eth14:green";
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gpios = <&sgpio_out0 14 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@13 {
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label = "eth14:yellow";
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gpios = <&sgpio_out0 14 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@14 {
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label = "eth15:green";
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gpios = <&sgpio_out0 15 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@15 {
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label = "eth15:yellow";
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gpios = <&sgpio_out0 15 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@16 {
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label = "eth48:green";
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gpios = <&sgpio_out1 16 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@17 {
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label = "eth48:yellow";
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gpios = <&sgpio_out1 16 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@18 {
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label = "eth49:green";
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gpios = <&sgpio_out1 17 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@19 {
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label = "eth49:yellow";
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gpios = <&sgpio_out1 17 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@20 {
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label = "eth50:green";
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gpios = <&sgpio_out1 18 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@21 {
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label = "eth50:yellow";
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gpios = <&sgpio_out1 18 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@22 {
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label = "eth51:green";
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gpios = <&sgpio_out1 19 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@23 {
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label = "eth51:yellow";
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gpios = <&sgpio_out1 19 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@24 {
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label = "eth52:green";
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gpios = <&sgpio_out1 20 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@25 {
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label = "eth52:yellow";
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gpios = <&sgpio_out1 20 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@26 {
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label = "eth53:green";
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gpios = <&sgpio_out1 21 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@27 {
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label = "eth53:yellow";
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gpios = <&sgpio_out1 21 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@28 {
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label = "eth54:green";
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gpios = <&sgpio_out1 22 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@29 {
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label = "eth54:yellow";
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gpios = <&sgpio_out1 22 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@30 {
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label = "eth55:green";
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gpios = <&sgpio_out1 23 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@31 {
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label = "eth55:yellow";
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gpios = <&sgpio_out1 23 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@32 {
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label = "eth56:green";
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gpios = <&sgpio_out1 24 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@33 {
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label = "eth56:yellow";
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gpios = <&sgpio_out1 24 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@34 {
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label = "eth57:green";
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gpios = <&sgpio_out1 25 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@35 {
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label = "eth57:yellow";
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gpios = <&sgpio_out1 25 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@36 {
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label = "eth58:green";
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gpios = <&sgpio_out1 26 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@37 {
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label = "eth58:yellow";
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gpios = <&sgpio_out1 26 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@38 {
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label = "eth59:green";
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gpios = <&sgpio_out1 27 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@39 {
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label = "eth59:yellow";
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gpios = <&sgpio_out1 27 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@40 {
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label = "eth60:green";
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gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@41 {
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label = "eth60:yellow";
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gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@42 {
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label = "eth61:green";
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gpios = <&sgpio_out1 29 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@43 {
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label = "eth61:yellow";
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gpios = <&sgpio_out1 29 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@44 {
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label = "eth62:green";
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gpios = <&sgpio_out1 30 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@45 {
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label = "eth62:yellow";
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gpios = <&sgpio_out1 30 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@46 {
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label = "eth63:green";
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gpios = <&sgpio_out1 31 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@47 {
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label = "eth63:yellow";
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gpios = <&sgpio_out1 31 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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};
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&sgpio0 {
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status = "okay";
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microchip,sgpio-port-ranges = <8 15>;
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gpio@0 {
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ngpios = <64>;
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};
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gpio@1 {
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ngpios = <64>;
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};
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};
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&sgpio1 {
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status = "okay";
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microchip,sgpio-port-ranges = <24 31>;
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gpio@0 {
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ngpios = <64>;
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};
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gpio@1 {
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ngpios = <64>;
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};
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0>;
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};
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};
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&spi0 {
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status = "okay";
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spi@0 {
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compatible = "spi-mux";
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mux-controls = <&mux>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* CS0 */
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spi-flash@9 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <8000000>;
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reg = <0x9>; /* SPI */
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};
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};
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};
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&sgpio0 {
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status = "okay";
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microchip,sgpio-port-ranges = <8 15>;
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gpio@0 {
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ngpios = <64>;
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};
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gpio@1 {
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ngpios = <64>;
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};
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};
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&sgpio1 {
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status = "okay";
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microchip,sgpio-port-ranges = <24 31>;
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gpio@0 {
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ngpios = <64>;
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};
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gpio@1 {
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ngpios = <64>;
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};
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};
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&sgpio2 {
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status = "okay";
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microchip,sgpio-port-ranges = <0 0>, <11 31>;
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};
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&gpio {
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i2cmux_pins_i: i2cmux-pins-i {
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pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19",
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"GPIO_20", "GPIO_22", "GPIO_36", "GPIO_35",
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"GPIO_50", "GPIO_51", "GPIO_56", "GPIO_57";
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function = "twi_scl_m";
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output-low;
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};
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i2cmux_0: i2cmux-0 {
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pins = "GPIO_16";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_1: i2cmux-1 {
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pins = "GPIO_17";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_2: i2cmux-2 {
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pins = "GPIO_18";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_3: i2cmux-3 {
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pins = "GPIO_19";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_4: i2cmux-4 {
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pins = "GPIO_20";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_5: i2cmux-5 {
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pins = "GPIO_22";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_6: i2cmux-6 {
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pins = "GPIO_36";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_7: i2cmux-7 {
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pins = "GPIO_35";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_8: i2cmux-8 {
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pins = "GPIO_50";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_9: i2cmux-9 {
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pins = "GPIO_51";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_10: i2cmux-10 {
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pins = "GPIO_56";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_11: i2cmux-11 {
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pins = "GPIO_57";
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function = "twi_scl_m";
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output-high;
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};
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};
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&axi {
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i2c0_imux: i2c0-imux@0 {
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compatible = "i2c-mux-pinctrl";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-parent = <&i2c0>;
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};
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i2c0_emux: i2c0-emux@0 {
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compatible = "i2c-mux-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-parent = <&i2c0>;
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};
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};
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&i2c0_imux {
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pinctrl-names =
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"i2c_sfp1", "i2c_sfp2", "i2c_sfp3", "i2c_sfp4",
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"i2c_sfp5", "i2c_sfp6", "i2c_sfp7", "i2c_sfp8",
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"i2c_sfp9", "i2c_sfp10", "i2c_sfp11", "i2c_sfp12", "idle";
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pinctrl-0 = <&i2cmux_0>;
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pinctrl-1 = <&i2cmux_1>;
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pinctrl-2 = <&i2cmux_2>;
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pinctrl-3 = <&i2cmux_3>;
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pinctrl-4 = <&i2cmux_4>;
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pinctrl-5 = <&i2cmux_5>;
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pinctrl-6 = <&i2cmux_6>;
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pinctrl-7 = <&i2cmux_7>;
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pinctrl-8 = <&i2cmux_8>;
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pinctrl-9 = <&i2cmux_9>;
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pinctrl-10 = <&i2cmux_10>;
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pinctrl-11 = <&i2cmux_11>;
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pinctrl-12 = <&i2cmux_pins_i>;
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i2c_sfp1: i2c_sfp1 {
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reg = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp2: i2c_sfp2 {
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reg = <0x1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp3: i2c_sfp3 {
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reg = <0x2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp4: i2c_sfp4 {
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reg = <0x3>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp5: i2c_sfp5 {
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reg = <0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp6: i2c_sfp6 {
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reg = <0x5>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp7: i2c_sfp7 {
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reg = <0x6>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp8: i2c_sfp8 {
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reg = <0x7>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp9: i2c_sfp9 {
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reg = <0x8>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp10: i2c_sfp10 {
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reg = <0x9>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp11: i2c_sfp11 {
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reg = <0xa>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_sfp12: i2c_sfp12 {
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reg = <0xb>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&i2c0_emux {
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mux-gpios = <&gpio 55 GPIO_ACTIVE_HIGH
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&gpio 60 GPIO_ACTIVE_HIGH
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&gpio 61 GPIO_ACTIVE_HIGH
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&gpio 54 GPIO_ACTIVE_HIGH>;
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idle-state = <0x8>;
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i2c_sfp13: i2c_sfp13 {
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reg = <0x0>;
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#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp14: i2c_sfp14 {
|
|
reg = <0x1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp15: i2c_sfp15 {
|
|
reg = <0x2>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp16: i2c_sfp16 {
|
|
reg = <0x3>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp17: i2c_sfp17 {
|
|
reg = <0x4>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp18: i2c_sfp18 {
|
|
reg = <0x5>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp19: i2c_sfp19 {
|
|
reg = <0x6>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
i2c_sfp20: i2c_sfp20 {
|
|
reg = <0x7>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&mdio3 {
|
|
status = "ok";
|
|
phy64: ethernet-phy@64 {
|
|
reg = <28>;
|
|
};
|
|
};
|
|
|
|
&axi {
|
|
sfp_eth12: sfp-eth12 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp1>;
|
|
tx-disable-gpios = <&sgpio_out2 11 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 11 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 11 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 12 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth13: sfp-eth13 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp2>;
|
|
tx-disable-gpios = <&sgpio_out2 12 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 12 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 12 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 13 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth14: sfp-eth14 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp3>;
|
|
tx-disable-gpios = <&sgpio_out2 13 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 13 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 13 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 14 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth15: sfp-eth15 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp4>;
|
|
tx-disable-gpios = <&sgpio_out2 14 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 14 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 14 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 15 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth48: sfp-eth48 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp5>;
|
|
tx-disable-gpios = <&sgpio_out2 15 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 15 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 15 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 16 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth49: sfp-eth49 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp6>;
|
|
tx-disable-gpios = <&sgpio_out2 16 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 16 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 16 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 17 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth50: sfp-eth50 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp7>;
|
|
tx-disable-gpios = <&sgpio_out2 17 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 17 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 17 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 18 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth51: sfp-eth51 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp8>;
|
|
tx-disable-gpios = <&sgpio_out2 18 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 18 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 18 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 19 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth52: sfp-eth52 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp9>;
|
|
tx-disable-gpios = <&sgpio_out2 19 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 19 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 19 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 20 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth53: sfp-eth53 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp10>;
|
|
tx-disable-gpios = <&sgpio_out2 20 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 20 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 20 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 21 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth54: sfp-eth54 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp11>;
|
|
tx-disable-gpios = <&sgpio_out2 21 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 21 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 21 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 22 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth55: sfp-eth55 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp12>;
|
|
tx-disable-gpios = <&sgpio_out2 22 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 22 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 22 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 23 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth56: sfp-eth56 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp13>;
|
|
tx-disable-gpios = <&sgpio_out2 23 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 23 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 23 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 24 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth57: sfp-eth57 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp14>;
|
|
tx-disable-gpios = <&sgpio_out2 24 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 24 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 24 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 25 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth58: sfp-eth58 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp15>;
|
|
tx-disable-gpios = <&sgpio_out2 25 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 25 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 25 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 26 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth59: sfp-eth59 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp16>;
|
|
tx-disable-gpios = <&sgpio_out2 26 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 26 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 26 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 27 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth60: sfp-eth60 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp17>;
|
|
tx-disable-gpios = <&sgpio_out2 27 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 27 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 27 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 28 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth61: sfp-eth61 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp18>;
|
|
tx-disable-gpios = <&sgpio_out2 28 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 28 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 28 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 29 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth62: sfp-eth62 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp19>;
|
|
tx-disable-gpios = <&sgpio_out2 29 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 29 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 29 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 30 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
sfp_eth63: sfp-eth63 {
|
|
compatible = "sff,sfp";
|
|
i2c-bus = <&i2c_sfp20>;
|
|
tx-disable-gpios = <&sgpio_out2 30 1 GPIO_ACTIVE_LOW>;
|
|
los-gpios = <&sgpio_in2 30 1 GPIO_ACTIVE_HIGH>;
|
|
mod-def0-gpios = <&sgpio_in2 30 2 GPIO_ACTIVE_LOW>;
|
|
tx-fault-gpios = <&sgpio_in2 31 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
&switch {
|
|
ethernet-ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
/* 10G SFPs */
|
|
port12: port@12 {
|
|
reg = <12>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 13>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth12>;
|
|
microchip,sd-sgpio = <301>;
|
|
managed = "in-band-status";
|
|
};
|
|
port13: port@13 {
|
|
reg = <13>;
|
|
/* Example: CU SFP, 1G speed */
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 14>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth13>;
|
|
microchip,sd-sgpio = <305>;
|
|
managed = "in-band-status";
|
|
};
|
|
port14: port@14 {
|
|
reg = <14>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 15>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth14>;
|
|
microchip,sd-sgpio = <309>;
|
|
managed = "in-band-status";
|
|
};
|
|
port15: port@15 {
|
|
reg = <15>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 16>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth15>;
|
|
microchip,sd-sgpio = <313>;
|
|
managed = "in-band-status";
|
|
};
|
|
port48: port@48 {
|
|
reg = <48>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 17>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth48>;
|
|
microchip,sd-sgpio = <317>;
|
|
managed = "in-band-status";
|
|
};
|
|
port49: port@49 {
|
|
reg = <49>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 18>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth49>;
|
|
microchip,sd-sgpio = <321>;
|
|
managed = "in-band-status";
|
|
};
|
|
port50: port@50 {
|
|
reg = <50>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 19>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth50>;
|
|
microchip,sd-sgpio = <325>;
|
|
managed = "in-band-status";
|
|
};
|
|
port51: port@51 {
|
|
reg = <51>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 20>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth51>;
|
|
microchip,sd-sgpio = <329>;
|
|
managed = "in-band-status";
|
|
};
|
|
port52: port@52 {
|
|
reg = <52>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 21>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth52>;
|
|
microchip,sd-sgpio = <333>;
|
|
managed = "in-band-status";
|
|
};
|
|
port53: port@53 {
|
|
reg = <53>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 22>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth53>;
|
|
microchip,sd-sgpio = <337>;
|
|
managed = "in-band-status";
|
|
};
|
|
port54: port@54 {
|
|
reg = <54>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 23>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth54>;
|
|
microchip,sd-sgpio = <341>;
|
|
managed = "in-band-status";
|
|
};
|
|
port55: port@55 {
|
|
reg = <55>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 24>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth55>;
|
|
microchip,sd-sgpio = <345>;
|
|
managed = "in-band-status";
|
|
};
|
|
/* 25G SFPs */
|
|
port56: port@56 {
|
|
reg = <56>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 25>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth56>;
|
|
microchip,sd-sgpio = <349>;
|
|
managed = "in-band-status";
|
|
};
|
|
port57: port@57 {
|
|
reg = <57>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 26>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth57>;
|
|
microchip,sd-sgpio = <353>;
|
|
managed = "in-band-status";
|
|
};
|
|
port58: port@58 {
|
|
reg = <58>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 27>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth58>;
|
|
microchip,sd-sgpio = <357>;
|
|
managed = "in-band-status";
|
|
};
|
|
port59: port@59 {
|
|
reg = <59>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 28>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth59>;
|
|
microchip,sd-sgpio = <361>;
|
|
managed = "in-band-status";
|
|
};
|
|
port60: port@60 {
|
|
reg = <60>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 29>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth60>;
|
|
microchip,sd-sgpio = <365>;
|
|
managed = "in-band-status";
|
|
};
|
|
port61: port@61 {
|
|
reg = <61>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 30>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth61>;
|
|
microchip,sd-sgpio = <369>;
|
|
managed = "in-band-status";
|
|
};
|
|
port62: port@62 {
|
|
reg = <62>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 31>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth62>;
|
|
microchip,sd-sgpio = <373>;
|
|
managed = "in-band-status";
|
|
};
|
|
port63: port@63 {
|
|
reg = <63>;
|
|
microchip,bandwidth = <10000>;
|
|
phys = <&serdes 32>;
|
|
phy-mode = "10gbase-r";
|
|
sfp = <&sfp_eth63>;
|
|
microchip,sd-sgpio = <377>;
|
|
managed = "in-band-status";
|
|
};
|
|
/* Finally the Management interface */
|
|
port64: port@64 {
|
|
reg = <64>;
|
|
microchip,bandwidth = <1000>;
|
|
phys = <&serdes 0>;
|
|
phy-handle = <&phy64>;
|
|
phy-mode = "sgmii";
|
|
};
|
|
};
|
|
};
|