Tuomas Tynkkynen bf9d026775 ARM: tegra: Add the DFLL to Tegra124 device tree
The DFLL clocksource is a separate IP block from the usual
clock-and-reset controller, so it gets its own device tree node.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-21 18:44:24 +02:00
..
2015-06-26 11:08:27 -07:00
2015-05-15 21:43:23 +02:00