0f03bf3008
Add documentation for the bindings for Synopsys' DesignWare PWM block as we will be adding DT/platform support to the Linux driver soon. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
69 lines
1.5 KiB
YAML
69 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022 SiFive, Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DW-APB timers PWM controller
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maintainers:
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- Ben Dooks <ben.dooks@sifive.com>
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description:
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This describes the DesignWare APB timers module when used in the PWM
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mode. The IP core can be generated with various options which can
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control the functionality, the number of PWMs available and other
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internal controls the designer requires.
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The IP block has a version register so this can be used for detection
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instead of having to encode the IP version number in the device tree
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comaptible.
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allOf:
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- $ref: pwm.yaml#
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properties:
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compatible:
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const: snps,dw-apb-timers-pwm2
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reg:
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maxItems: 1
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"#pwm-cells":
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const: 3
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clocks:
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items:
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- description: Interface bus clock
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- description: PWM reference clock
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clock-names:
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items:
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- const: bus
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- const: timer
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snps,pwm-number:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: The number of PWM channels configured for this instance
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enum: [1, 2, 3, 4, 5, 6, 7, 8]
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required:
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- compatible
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- reg
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- "#pwm-cells"
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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pwm: pwm@180000 {
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compatible = "snps,dw-apb-timers-pwm2";
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reg = <0x180000 0x200>;
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#pwm-cells = <3>;
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clocks = <&bus>, <&timer>;
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clock-names = "bus", "timer";
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};
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