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linux/arch/x86/kernel/cpu
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Srinivas Pandruvada 4ecc933b7d x86: intel_epb: Allow model specific normal EPB value 
The current EPB "normal" is defined as 6 and set whenever power-up EPB
value is 0. This setting resulted in the desired out of box power and
performance for several CPU generations. But this value is not suitable
for AlderLake mobile CPUs, as this resulted in higher uncore power.
Since EPB is model specific, this is not unreasonable to have different
behavior.

Allow a capability where "normal" EPB can be redefined. For AlderLake
mobile CPUs this desired normal value is 7.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-01-04 16:37:23 +01:00
..
mce - Add the model number of a new, Raptor Lake CPU, to intel-family.h 2021-11-14 09:29:03 -08:00
microcode x86/microcode: Use the firmware_loader built-in API 2021-10-22 14:13:50 +02:00
mtrr x86/mtrr: Replace deprecated CPU-hotplug functions. 2021-08-10 14:46:27 +02:00
resctrl x86/resctrl: Fix kfree() of the wrong type in domain_add_cpu() 2021-10-06 18:45:27 +02:00
sgx x86/sgx: Fix free page accounting 2021-11-16 11:17:43 -08:00
.gitignore
acrn.c x86/acrn: Introduce acrn_cpuid_base() and hypervisor feature bits 2021-02-09 10:58:18 +01:00
amd.c x86/cpu: Fix migration safety with X86_BUG_NULL_SEL 2021-10-21 20:49:16 +02:00
aperfmperf.c x86/cpu: Avoid cpuinfo-induced IPIing of idle CPUs 2020-11-06 16:59:11 -08:00
bugs.c seccomp updates for v5.16-rc1 2021-11-01 17:25:09 -07:00
cacheinfo.c sched: Add cluster scheduler level for x86 2021-10-15 11:25:16 +02:00
centaur.c x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support 2020-09-11 10:53:19 +02:00
common.c - Start checking a CPUID bit on AMD Zen3 which states that the CPU 2021-11-01 15:33:54 -07:00
cpu.h x86/cpu: Fix migration safety with X86_BUG_NULL_SEL 2021-10-21 20:49:16 +02:00
cpuid-deps.c x86/fpu: Optimize out sigframe xfeatures when in init state 2021-11-03 22:42:35 +01:00
cyrix.c x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
feat_ctl.c x86/cpu/intel: Allow SGX virtualization without Launch Control support 2021-04-06 09:43:41 +02:00
hygon.c x86/cpu: Fix migration safety with X86_BUG_NULL_SEL 2021-10-21 20:49:16 +02:00
hypervisor.c
intel_epb.c x86: intel_epb: Allow model specific normal EPB value 2022-01-04 16:37:23 +01:00
intel_pconfig.c
intel.c Changes in this cycle were: 2021-06-28 13:30:02 -07:00
Makefile x86/CPU: Add support for Vortex CPUs 2021-10-21 15:49:07 +02:00
match.c x86/cpu: Add a steppings field to struct x86_cpu_id 2020-04-20 12:19:21 +02:00
mkcapflags.sh
mshyperv.c x86/hyperv: Move required MSRs check to initial platform probing 2021-11-15 12:37:08 +00:00
perfctr-watchdog.c x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs 2021-06-10 10:04:40 +02:00
powerflags.c
proc.c
rdrand.c
scattered.c x86/cpufeatures: Add SGX1 and SGX2 sub-features 2021-03-25 17:33:11 +01:00
topology.c x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
transmeta.c
tsx.c x86/tsx: Clear CPUID bits when TSX always force aborts 2021-06-15 17:46:48 +02:00
umc.c
umwait.c KVM: VMX: Stop context switching MSR_IA32_UMWAIT_CONTROL 2020-06-22 20:54:57 -04:00
vmware.c Have vmware guests skip the refined TSC calibration when the TSC 2021-04-26 09:13:43 -07:00
vortex.c x86/CPU: Add support for Vortex CPUs 2021-10-21 15:49:07 +02:00
zhaoxin.c x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00