3367934dd3
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding" or a "schema", but instead just describe the hardware. Manual updates to various binding titles, including capitalizing them. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # opp Link: https://lore.kernel.org/r/20221216163815.522628-10-krzysztof.kozlowski@linaro.org [robh: add trivial-devices.yaml and net/can/microchip,mcp251xfd.yaml] Signed-off-by: Rob Herring <robh@kernel.org>
51 lines
1.2 KiB
YAML
51 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Calxeda Highbank Combination PHYs for SATA
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description: |
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The Calxeda Combination PHYs connect the SoC to the internal fabric
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and to SATA connectors. The PHYs support multiple protocols (SATA,
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SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
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controller).
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Programming the PHYs is typically handled by those device drivers,
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not by a dedicated PHY driver.
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maintainers:
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- Andre Przywara <andre.przywara@arm.com>
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properties:
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compatible:
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const: calxeda,hb-combophy
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'#phy-cells':
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const: 1
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reg:
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maxItems: 1
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phydev:
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description: device ID for programming the ComboPHY.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 31
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required:
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- compatible
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- reg
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- phydev
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- '#phy-cells'
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additionalProperties: false
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examples:
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- |
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combophy5: combo-phy@fff5d000 {
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compatible = "calxeda,hb-combophy";
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#phy-cells = <1>;
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reg = <0xfff5d000 0x1000>;
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phydev = <31>;
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};
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