41c0e939d7
Hi3660 mailbox controller is used to send message within multiple processors, MCU, HIFI, etc. It supports 32 mailbox channels and every channel can only be used for single transferring direction. Once the channel is enabled, it needs to specify the destination interrupt and acknowledge interrupt, these two interrupt vectors are used to create the connection between the mailbox and interrupt controllers. The data transferring supports two modes, one is named as "automatic acknowledge" mode so after send message the kernel doesn't need to wait for acknowledge from remote and directly return; there have another mode is to rely on handling interrupt for acknowledge. This commit is for initial version driver, which only supports "automatic acknowledge" mode to support CPU clock, which is the only one consumer to use mailbox and has been verified. Later may enhance this driver for interrupt mode (e.g. for supporting HIFI). Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Ruyi Wang <wangruyi@huawei.com> Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
183 lines
6.2 KiB
Plaintext
183 lines
6.2 KiB
Plaintext
menuconfig MAILBOX
|
|
bool "Mailbox Hardware Support"
|
|
help
|
|
Mailbox is a framework to control hardware communication between
|
|
on-chip processors through queued messages and interrupt driven
|
|
signals. Say Y if your platform supports hardware mailboxes.
|
|
|
|
if MAILBOX
|
|
|
|
config ARM_MHU
|
|
tristate "ARM MHU Mailbox"
|
|
depends on ARM_AMBA
|
|
help
|
|
Say Y here if you want to build the ARM MHU controller driver.
|
|
The controller has 3 mailbox channels, the last of which can be
|
|
used in Secure mode only.
|
|
|
|
config PLATFORM_MHU
|
|
tristate "Platform MHU Mailbox"
|
|
depends on OF
|
|
depends on HAS_IOMEM
|
|
help
|
|
Say Y here if you want to build a platform specific variant MHU
|
|
controller driver.
|
|
The controller has a maximum of 3 mailbox channels, the last of
|
|
which can be used in Secure mode only.
|
|
|
|
config PL320_MBOX
|
|
bool "ARM PL320 Mailbox"
|
|
depends on ARM_AMBA
|
|
help
|
|
An implementation of the ARM PL320 Interprocessor Communication
|
|
Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
|
|
send short messages between Highbank's A9 cores and the EnergyCore
|
|
Management Engine, primarily for cpufreq. Say Y here if you want
|
|
to use the PL320 IPCM support.
|
|
|
|
config OMAP2PLUS_MBOX
|
|
tristate "OMAP2+ Mailbox framework support"
|
|
depends on ARCH_OMAP2PLUS
|
|
help
|
|
Mailbox implementation for OMAP family chips with hardware for
|
|
interprocessor communication involving DSP, IVA1.0 and IVA2 in
|
|
OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
|
|
want to use OMAP2+ Mailbox framework support.
|
|
|
|
config OMAP_MBOX_KFIFO_SIZE
|
|
int "Mailbox kfifo default buffer size (bytes)"
|
|
depends on OMAP2PLUS_MBOX
|
|
default 256
|
|
help
|
|
Specify the default size of mailbox's kfifo buffers (bytes).
|
|
This can also be changed at runtime (via the mbox_kfifo_size
|
|
module parameter).
|
|
|
|
config ROCKCHIP_MBOX
|
|
bool "Rockchip Soc Intergrated Mailbox Support"
|
|
depends on ARCH_ROCKCHIP || COMPILE_TEST
|
|
help
|
|
This driver provides support for inter-processor communication
|
|
between CPU cores and MCU processor on Some Rockchip SOCs.
|
|
Please check it that the Soc you use have Mailbox hardware.
|
|
Say Y here if you want to use the Rockchip Mailbox support.
|
|
|
|
config PCC
|
|
bool "Platform Communication Channel Driver"
|
|
depends on ACPI
|
|
default n
|
|
help
|
|
ACPI 5.0+ spec defines a generic mode of communication
|
|
between the OS and a platform such as the BMC. This medium
|
|
(PCC) is typically used by CPPC (ACPI CPU Performance management),
|
|
RAS (ACPI reliability protocol) and MPST (ACPI Memory power
|
|
states). Select this driver if your platform implements the
|
|
PCC clients mentioned above.
|
|
|
|
config ALTERA_MBOX
|
|
tristate "Altera Mailbox"
|
|
depends on HAS_IOMEM
|
|
help
|
|
An implementation of the Altera Mailbox soft core. It is used
|
|
to send message between processors. Say Y here if you want to use the
|
|
Altera mailbox support.
|
|
|
|
config BCM2835_MBOX
|
|
tristate "BCM2835 Mailbox"
|
|
depends on ARCH_BCM2835
|
|
help
|
|
An implementation of the BCM2385 Mailbox. It is used to invoke
|
|
the services of the Videocore. Say Y here if you want to use the
|
|
BCM2835 Mailbox.
|
|
|
|
config STI_MBOX
|
|
tristate "STI Mailbox framework support"
|
|
depends on ARCH_STI && OF
|
|
help
|
|
Mailbox implementation for STMicroelectonics family chips with
|
|
hardware for interprocessor communication.
|
|
|
|
config TI_MESSAGE_MANAGER
|
|
tristate "Texas Instruments Message Manager Driver"
|
|
depends on ARCH_KEYSTONE
|
|
help
|
|
An implementation of Message Manager slave driver for Keystone
|
|
architecture SoCs from Texas Instruments. Message Manager is a
|
|
communication entity found on few of Texas Instrument's keystone
|
|
architecture SoCs. These may be used for communication between
|
|
multiple processors within the SoC. Select this driver if your
|
|
platform has support for the hardware block.
|
|
|
|
config HI3660_MBOX
|
|
tristate "Hi3660 Mailbox"
|
|
depends on ARCH_HISI && OF
|
|
help
|
|
An implementation of the hi3660 mailbox. It is used to send message
|
|
between application processors and other processors/MCU/DSP. Select
|
|
Y here if you want to use Hi3660 mailbox controller.
|
|
|
|
config HI6220_MBOX
|
|
tristate "Hi6220 Mailbox"
|
|
depends on ARCH_HISI
|
|
help
|
|
An implementation of the hi6220 mailbox. It is used to send message
|
|
between application processors and MCU. Say Y here if you want to
|
|
build Hi6220 mailbox controller driver.
|
|
|
|
config MAILBOX_TEST
|
|
tristate "Mailbox Test Client"
|
|
depends on OF
|
|
depends on HAS_IOMEM
|
|
help
|
|
Test client to help with testing new Controller driver
|
|
implementations.
|
|
|
|
config QCOM_APCS_IPC
|
|
tristate "Qualcomm APCS IPC driver"
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
help
|
|
Say y here to enable support for the APCS IPC mailbox driver,
|
|
providing an interface for invoking the inter-process communication
|
|
signals from the application processor to other masters.
|
|
|
|
config TEGRA_HSP_MBOX
|
|
bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
|
|
depends on ARCH_TEGRA
|
|
help
|
|
The Tegra HSP driver is used for the interprocessor communication
|
|
between different remote processors and host processors on Tegra186
|
|
and later SoCs. Say Y here if you want to have this support.
|
|
If unsure say N.
|
|
|
|
config XGENE_SLIMPRO_MBOX
|
|
tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
|
|
depends on ARCH_XGENE
|
|
help
|
|
An implementation of the APM X-Gene Interprocessor Communication
|
|
Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
|
|
It is used to send short messages between ARM64-bit cores and
|
|
the SLIMpro Management Engine, primarily for PM. Say Y here if you
|
|
want to use the APM X-Gene SLIMpro IPCM support.
|
|
|
|
config BCM_PDC_MBOX
|
|
tristate "Broadcom FlexSparx DMA Mailbox"
|
|
depends on ARCH_BCM_IPROC || COMPILE_TEST
|
|
depends on HAS_DMA
|
|
help
|
|
Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
|
|
which provides access to various offload engines on Broadcom
|
|
SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
|
|
|
|
config BCM_FLEXRM_MBOX
|
|
tristate "Broadcom FlexRM Mailbox"
|
|
depends on ARM64
|
|
depends on ARCH_BCM_IPROC || COMPILE_TEST
|
|
depends on HAS_DMA
|
|
select GENERIC_MSI_IRQ_DOMAIN
|
|
default m if ARCH_BCM_IPROC
|
|
help
|
|
Mailbox implementation of the Broadcom FlexRM ring manager,
|
|
which provides access to various offload engines on Broadcom
|
|
SoCs. Say Y here if you want to use the Broadcom FlexRM.
|
|
endif
|