Jarkko Nikula c23fd751dc ASoC: tlv320aic3x: Optimize PLL programming in aic3x_set_bias_level
There is only need to enable/disable once the PLL when the bias is going
between on, prepare, standby and off states.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
2010-09-11 09:03:20 +01:00
..
2010-05-27 09:47:02 +02:00