7d77dcc83a
The transition to auto-mode happens when the PMF driver receives AMT (Auto Mode transition) event. transition logic will reside in the PMF driver but the events would come from other supported drivers[1]. The thermal parameters would vary between when a performance "on-lap" mode is detected and versus when not. The CQL event would get triggered from other drivers, so that PMF driver would adjust the system thermal config based on the ACPI inputs. OEMs can control whether or not to enable AMT or CQL via other supported drivers[1] but the actual transition logic resides in the AMD PMF driver. When an AMT event is received the automatic mode transition RAPL algorithm will run. When a CQL event is received an performance "on-lap" mode will be enabled and thermal parameters will be adjusted accordingly. [1] Link: https://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git/commit/?h=review-hans&id=755b249250df1b612d982f3b702c831b26ecdf73 Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Mark Pearson <markpearson@lenovo.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20220802151149.2123699-10-Shyam-sundar.S-k@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
302 lines
11 KiB
C
302 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* AMD Platform Management Framework Driver
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*
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* Copyright (c) 2022, Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
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*/
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#include <linux/acpi.h>
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#include <linux/workqueue.h>
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#include "pmf.h"
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static struct auto_mode_mode_config config_store;
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static const char *state_as_str(unsigned int state);
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static void amd_pmf_set_automode(struct amd_pmf_dev *dev, int idx,
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struct auto_mode_mode_config *table)
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{
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struct power_table_control *pwr_ctrl = &config_store.mode_set[idx].power_control;
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amd_pmf_send_cmd(dev, SET_SPL, false, pwr_ctrl->spl, NULL);
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amd_pmf_send_cmd(dev, SET_FPPT, false, pwr_ctrl->fppt, NULL);
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amd_pmf_send_cmd(dev, SET_SPPT, false, pwr_ctrl->sppt, NULL);
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amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pwr_ctrl->sppt_apu_only, NULL);
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amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pwr_ctrl->stt_min, NULL);
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amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
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pwr_ctrl->stt_skin_temp[STT_TEMP_APU], NULL);
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amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
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pwr_ctrl->stt_skin_temp[STT_TEMP_HS2], NULL);
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if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))
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apmf_update_fan_idx(dev, config_store.mode_set[idx].fan_control.manual,
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config_store.mode_set[idx].fan_control.fan_id);
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}
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static int amd_pmf_get_moving_avg(struct amd_pmf_dev *pdev, int socket_power)
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{
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int i, total = 0;
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if (pdev->socket_power_history_idx == -1) {
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for (i = 0; i < AVG_SAMPLE_SIZE; i++)
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pdev->socket_power_history[i] = socket_power;
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}
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pdev->socket_power_history_idx = (pdev->socket_power_history_idx + 1) % AVG_SAMPLE_SIZE;
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pdev->socket_power_history[pdev->socket_power_history_idx] = socket_power;
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for (i = 0; i < AVG_SAMPLE_SIZE; i++)
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total += pdev->socket_power_history[i];
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return total / AVG_SAMPLE_SIZE;
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}
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void amd_pmf_trans_automode(struct amd_pmf_dev *dev, int socket_power, ktime_t time_elapsed_ms)
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{
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int avg_power = 0;
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bool update = false;
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int i, j;
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/* Get the average moving average computed by auto mode algorithm */
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avg_power = amd_pmf_get_moving_avg(dev, socket_power);
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for (i = 0; i < AUTO_TRANSITION_MAX; i++) {
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if ((config_store.transition[i].shifting_up && avg_power >=
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config_store.transition[i].power_threshold) ||
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(!config_store.transition[i].shifting_up && avg_power <=
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config_store.transition[i].power_threshold)) {
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if (config_store.transition[i].timer <
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config_store.transition[i].time_constant)
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config_store.transition[i].timer += time_elapsed_ms;
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} else {
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config_store.transition[i].timer = 0;
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}
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if (config_store.transition[i].timer >=
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config_store.transition[i].time_constant &&
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!config_store.transition[i].applied) {
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config_store.transition[i].applied = true;
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update = true;
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} else if (config_store.transition[i].timer <=
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config_store.transition[i].time_constant &&
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config_store.transition[i].applied) {
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config_store.transition[i].applied = false;
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update = true;
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}
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}
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dev_dbg(dev->dev, "[AUTO_MODE] avg power: %u mW mode: %s\n", avg_power,
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state_as_str(config_store.current_mode));
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if (update) {
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for (j = 0; j < AUTO_TRANSITION_MAX; j++) {
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/* Apply the mode with highest priority indentified */
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if (config_store.transition[j].applied) {
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if (config_store.current_mode !=
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config_store.transition[j].target_mode) {
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config_store.current_mode =
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config_store.transition[j].target_mode;
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dev_dbg(dev->dev, "[AUTO_MODE] moving to mode:%s\n",
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state_as_str(config_store.current_mode));
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amd_pmf_set_automode(dev, config_store.current_mode, NULL);
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}
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break;
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}
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}
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}
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}
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void amd_pmf_update_2_cql(struct amd_pmf_dev *dev, bool is_cql_event)
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{
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int mode = config_store.current_mode;
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].target_mode =
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is_cql_event ? AUTO_PERFORMANCE_ON_LAP : AUTO_PERFORMANCE;
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if ((mode == AUTO_PERFORMANCE || mode == AUTO_PERFORMANCE_ON_LAP) &&
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mode != config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].target_mode) {
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mode = config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].target_mode;
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amd_pmf_set_automode(dev, mode, NULL);
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}
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dev_dbg(dev->dev, "updated CQL thermals\n");
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}
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static void amd_pmf_get_power_threshold(void)
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{
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config_store.transition[AUTO_TRANSITION_TO_QUIET].power_threshold =
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config_store.mode_set[AUTO_BALANCE].power_floor -
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config_store.transition[AUTO_TRANSITION_TO_QUIET].power_delta;
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].power_threshold =
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config_store.mode_set[AUTO_BALANCE].power_floor -
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].power_delta;
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config_store.transition[AUTO_TRANSITION_FROM_QUIET_TO_BALANCE].power_threshold =
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config_store.mode_set[AUTO_QUIET].power_floor -
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config_store.transition[AUTO_TRANSITION_FROM_QUIET_TO_BALANCE].power_delta;
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config_store.transition[AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE].power_threshold =
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config_store.mode_set[AUTO_PERFORMANCE].power_floor -
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config_store.transition[AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE].power_delta;
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}
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static const char *state_as_str(unsigned int state)
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{
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switch (state) {
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case AUTO_QUIET:
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return "QUIET";
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case AUTO_BALANCE:
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return "BALANCED";
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case AUTO_PERFORMANCE_ON_LAP:
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return "ON_LAP";
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case AUTO_PERFORMANCE:
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return "PERFORMANCE";
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default:
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return "Unknown Auto Mode State";
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}
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}
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static void amd_pmf_load_defaults_auto_mode(struct amd_pmf_dev *dev)
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{
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struct apmf_auto_mode output;
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struct power_table_control *pwr_ctrl;
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int i;
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apmf_get_auto_mode_def(dev, &output);
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/* time constant */
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config_store.transition[AUTO_TRANSITION_TO_QUIET].time_constant =
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output.balanced_to_quiet;
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].time_constant =
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output.balanced_to_perf;
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config_store.transition[AUTO_TRANSITION_FROM_QUIET_TO_BALANCE].time_constant =
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output.quiet_to_balanced;
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config_store.transition[AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE].time_constant =
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output.perf_to_balanced;
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/* power floor */
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config_store.mode_set[AUTO_QUIET].power_floor = output.pfloor_quiet;
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config_store.mode_set[AUTO_BALANCE].power_floor = output.pfloor_balanced;
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config_store.mode_set[AUTO_PERFORMANCE].power_floor = output.pfloor_perf;
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config_store.mode_set[AUTO_PERFORMANCE_ON_LAP].power_floor = output.pfloor_perf;
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/* Power delta for mode change */
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config_store.transition[AUTO_TRANSITION_TO_QUIET].power_delta =
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output.pd_balanced_to_quiet;
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].power_delta =
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output.pd_balanced_to_perf;
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config_store.transition[AUTO_TRANSITION_FROM_QUIET_TO_BALANCE].power_delta =
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output.pd_quiet_to_balanced;
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config_store.transition[AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE].power_delta =
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output.pd_perf_to_balanced;
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/* Power threshold */
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amd_pmf_get_power_threshold();
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/* skin temperature limits */
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pwr_ctrl = &config_store.mode_set[AUTO_QUIET].power_control;
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pwr_ctrl->spl = output.spl_quiet;
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pwr_ctrl->sppt = output.sppt_quiet;
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pwr_ctrl->fppt = output.fppt_quiet;
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pwr_ctrl->sppt_apu_only = output.sppt_apu_only_quiet;
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pwr_ctrl->stt_min = output.stt_min_limit_quiet;
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pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_quiet;
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pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_quiet;
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pwr_ctrl = &config_store.mode_set[AUTO_BALANCE].power_control;
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pwr_ctrl->spl = output.spl_balanced;
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pwr_ctrl->sppt = output.sppt_balanced;
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pwr_ctrl->fppt = output.fppt_balanced;
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pwr_ctrl->sppt_apu_only = output.sppt_apu_only_balanced;
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pwr_ctrl->stt_min = output.stt_min_limit_balanced;
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pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_balanced;
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pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_balanced;
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pwr_ctrl = &config_store.mode_set[AUTO_PERFORMANCE].power_control;
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pwr_ctrl->spl = output.spl_perf;
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pwr_ctrl->sppt = output.sppt_perf;
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pwr_ctrl->fppt = output.fppt_perf;
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pwr_ctrl->sppt_apu_only = output.sppt_apu_only_perf;
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pwr_ctrl->stt_min = output.stt_min_limit_perf;
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pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_perf;
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pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_perf;
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pwr_ctrl = &config_store.mode_set[AUTO_PERFORMANCE_ON_LAP].power_control;
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pwr_ctrl->spl = output.spl_perf_on_lap;
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pwr_ctrl->sppt = output.sppt_perf_on_lap;
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pwr_ctrl->fppt = output.fppt_perf_on_lap;
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pwr_ctrl->sppt_apu_only = output.sppt_apu_only_perf_on_lap;
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pwr_ctrl->stt_min = output.stt_min_limit_perf_on_lap;
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pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_perf_on_lap;
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pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_perf_on_lap;
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/* Fan ID */
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config_store.mode_set[AUTO_QUIET].fan_control.fan_id = output.fan_id_quiet;
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config_store.mode_set[AUTO_BALANCE].fan_control.fan_id = output.fan_id_balanced;
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config_store.mode_set[AUTO_PERFORMANCE].fan_control.fan_id = output.fan_id_perf;
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config_store.mode_set[AUTO_PERFORMANCE_ON_LAP].fan_control.fan_id =
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output.fan_id_perf;
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config_store.transition[AUTO_TRANSITION_TO_QUIET].target_mode = AUTO_QUIET;
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].target_mode =
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AUTO_PERFORMANCE;
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config_store.transition[AUTO_TRANSITION_FROM_QUIET_TO_BALANCE].target_mode =
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AUTO_BALANCE;
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config_store.transition[AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE].target_mode =
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AUTO_BALANCE;
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config_store.transition[AUTO_TRANSITION_TO_QUIET].shifting_up = false;
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config_store.transition[AUTO_TRANSITION_TO_PERFORMANCE].shifting_up = true;
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config_store.transition[AUTO_TRANSITION_FROM_QUIET_TO_BALANCE].shifting_up = true;
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config_store.transition[AUTO_TRANSITION_FROM_PERFORMANCE_TO_BALANCE].shifting_up =
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false;
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for (i = 0 ; i < AUTO_MODE_MAX ; i++) {
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if (config_store.mode_set[i].fan_control.fan_id == FAN_INDEX_AUTO)
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config_store.mode_set[i].fan_control.manual = false;
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else
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config_store.mode_set[i].fan_control.manual = true;
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}
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/* set to initial default values */
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config_store.current_mode = AUTO_BALANCE;
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dev->socket_power_history_idx = -1;
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}
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void amd_pmf_reset_amt(struct amd_pmf_dev *dev)
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{
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/*
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* OEM BIOS implementation guide says that if the auto mode is enabled
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* the platform_profile registration shall be done by the OEM driver.
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* There could be cases where both static slider and auto mode BIOS
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* functions are enabled, in that case enable static slider updates
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* only if it advertised as supported.
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*/
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if (is_apmf_func_supported(dev, APMF_FUNC_STATIC_SLIDER_GRANULAR)) {
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u8 mode = amd_pmf_get_pprof_modes(dev);
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dev_dbg(dev->dev, "resetting AMT thermals\n");
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amd_pmf_update_slider(dev, SLIDER_OP_SET, mode, NULL);
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}
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}
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void amd_pmf_handle_amt(struct amd_pmf_dev *dev)
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{
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amd_pmf_set_automode(dev, config_store.current_mode, NULL);
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}
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void amd_pmf_deinit_auto_mode(struct amd_pmf_dev *dev)
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{
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cancel_delayed_work_sync(&dev->work_buffer);
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}
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void amd_pmf_init_auto_mode(struct amd_pmf_dev *dev)
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{
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amd_pmf_load_defaults_auto_mode(dev);
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/* update the thermal limits for Automode */
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amd_pmf_set_automode(dev, config_store.current_mode, NULL);
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amd_pmf_init_metrics_table(dev);
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}
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