9f68e3655a
uapi: - dma-buf heaps added (and fixed) - command line add support for panel oreientation - command line allow overriding penguin count drm: - mipi dsi definition updates - lockdep annotations for dma_resv - remove dma-buf kmap/kunmap support - constify fb_ops in all fbdev drivers - MST fix for daisy chained hotplug- - CTA-861-G modes with VIC >= 193 added - fix drm_panel_of_backlight export - LVDS decoder support - more device based logging support - scanline alighment for dumb buffers - MST DSC helpers scheduler: - documentation fixes - job distribution improvements panel: - Logic PD type 28 panel support - Jimax8729d MIPI-DSI - igenic JZ4770 - generic DSI devicetree bindings - sony acx424AKP panel - Leadtek LTK500HD1829 - xinpeng XPP055C272 - AUO B116XAK01 - GiantPlus GPM940B0 - BOE NV140FHM-N49 - Satoz SAT050AT40H12R2 - Sharp LS020B1DD01D panels. ttm: - use blocking WW lock i915: - hw/uapi state separation - Lock annotation improvements - selftest improvements - ICL/TGL DSI VDSC support - VBT parsing improvments - Display refactoring - DSI updates + fixes - HDCP 2.2 for CFL - CML PCI ID fixes - GLK+ fbc fix - PSR fixes - GEN/GT refactor improvments - DP MST fixes - switch context id alloc to xarray - workaround updates - LMEM debugfs support - tiled monitor fixes - ICL+ clock gating programming removed - DP MST disable sequence fixed - LMEM discontiguous object maps - prefaulting for discontiguous objects - use LMEM for dumb buffers if possible - add LMEM mmap support amdgpu: - enable sync object timelines for vulkan - MST atomic routines - enable MST DSC support - add DMCUB display microengine support - DC OEM i2c support - Renoir DC fixes - Initial HDCP 2.x support - BACO support for Arcturus - Use BACO for runtime PM power save - gfxoff on navi10 - gfx10 golden updates and fixes - DCN support on POWER - GFXOFF for raven1 refresh - MM engine idle handlers cleanup - 10bpc EDP panel fixes - renoir watermark fixes - SR-IOV fixes - Arcturus VCN fixes - GDDR6 training fixes - freesync fixes - Pollock support amdkfd: - unify more codepath with amdgpu - use KIQ to setup HIQ rather than MMIO radeon: - fix vma fault handler race - PPC DMA fix - register check fixes for r100/r200 nouveau: - mmap_sem vs dma_resv fix - rewrite the ACR secure boot code for Turing - TU10x graphics engine support (TU11x pending) - Page kind mapping for turing - 10-bit LUT support - GP10B Tegra fixes - HD audio regression fix hisilicon/hibmc: - use generic fbdev code and helpers rockchip: - dsi/px30 support virtio: - fb damage support - static some functions vc4: - use dma_resv lock wrappers msm: - use dma_resv lock wrappers - sc7180 display + DSI support - a618 support - UBWC support improvements vmwgfx: - updates + new logging uapi exynos: - enable/disable callback cleanups etnaviv: - use dma_resv lock wrappers atmel-hlcdc: - clock fixes mediatek: - cmdq support - non-smooth cursor fixes - ctm property support sun4i: - suspend support - A64 mipi dsi support rcar-du: - Color management module support - LVDS encoder dual-link support - R8A77980 support analogic: - add support for an6345 ast: - atomic modeset support - primary plane garbage fix arcgpu: - fixes for fourcc handling tegra: - minor fixes and improvments mcde: - vblank support meson: - OSD1 plane AFBC commit gma500: - add pageflip support - reomve global drm_dev komeda: - tweak debugfs output - d32 support - runtime PM suppotr udl: - use generic shmem helpers - cleanup and fixes -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJeMm6RAAoJEAx081l5xIa+vN8P/0j4jEOv+KIinAhoH+LG3EpD m2TUuu5OQIoBrcCoWOgFBk3wqYpw6PdMBdkXh+5sE5lfeBynp8oC3Bin+QsHJE05 eGBpZtHe+70MQb0Eha+Aic0hchvBKzRnq6i0MYSIHn6afs76dLmF8knTjycxrvV5 Xu1Z3WDmjzqgWF9ja5JCD6fby11seP5RrwObYKVikO35QQyJJwGSGKgu5rq/pByK /n0PCnCOINuL0Lz6J9qexdh/0/XYFQilRC31GJNlKbDSFuECF0GOEzEE/xUBW/pI dLh2YwIIygm18Gar9PgvMwXJn3BfzQ0qEJsf+HlQeNw9iLgbHpp2AsTxHTE87OGe R/y85taW3jGjPsNOKZOeLpvg/Ro8l8ZipLApvDCG2O22DThg/cd6NDjZxl1FJfRH acDG/JdgPo5MbdRAH/cM1WuFS9gEM+0BeSQ5gCjtPakF+X4Vz+ABFDLMRJoaejkJ q8DG32TQXELQx0RMghsqK7YCWGfl+2alA1u9w6TgJh9Rq4iVckvpDeqAZnK1Adkc 87g957Tl0n6FA4wJj/t5jrceiLRMJAm/rBK+R3GZNfWrgx4bHbCmb4fZDZsrFzph nbAjNJ5kOchrFCaRR47ULby6+Q14MAFbkWq4Crfu4YDdzUkTPpep6pi2GIe8w0rV P0hdYOYJf6LUda0utuQX =oFrI -----END PGP SIGNATURE----- Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Davbe Airlie: "This is the main pull request for graphics for 5.6. Usual selection of changes all over. I've got one outstanding vmwgfx pull that touches mm so kept it separate until after all of this lands. I'll try and get it to you soon after this, but it might be early next week (nothing wrong with code, just my schedule is messy) This also hits a lot of fbdev drivers with some cleanups. Other notables: - vulkan timeline semaphore support added to syncobjs - nouveau turing secureboot/graphics support - Displayport MST display stream compression support Detailed summary: uapi: - dma-buf heaps added (and fixed) - command line add support for panel oreientation - command line allow overriding penguin count drm: - mipi dsi definition updates - lockdep annotations for dma_resv - remove dma-buf kmap/kunmap support - constify fb_ops in all fbdev drivers - MST fix for daisy chained hotplug- - CTA-861-G modes with VIC >= 193 added - fix drm_panel_of_backlight export - LVDS decoder support - more device based logging support - scanline alighment for dumb buffers - MST DSC helpers scheduler: - documentation fixes - job distribution improvements panel: - Logic PD type 28 panel support - Jimax8729d MIPI-DSI - igenic JZ4770 - generic DSI devicetree bindings - sony acx424AKP panel - Leadtek LTK500HD1829 - xinpeng XPP055C272 - AUO B116XAK01 - GiantPlus GPM940B0 - BOE NV140FHM-N49 - Satoz SAT050AT40H12R2 - Sharp LS020B1DD01D panels. ttm: - use blocking WW lock i915: - hw/uapi state separation - Lock annotation improvements - selftest improvements - ICL/TGL DSI VDSC support - VBT parsing improvments - Display refactoring - DSI updates + fixes - HDCP 2.2 for CFL - CML PCI ID fixes - GLK+ fbc fix - PSR fixes - GEN/GT refactor improvments - DP MST fixes - switch context id alloc to xarray - workaround updates - LMEM debugfs support - tiled monitor fixes - ICL+ clock gating programming removed - DP MST disable sequence fixed - LMEM discontiguous object maps - prefaulting for discontiguous objects - use LMEM for dumb buffers if possible - add LMEM mmap support amdgpu: - enable sync object timelines for vulkan - MST atomic routines - enable MST DSC support - add DMCUB display microengine support - DC OEM i2c support - Renoir DC fixes - Initial HDCP 2.x support - BACO support for Arcturus - Use BACO for runtime PM power save - gfxoff on navi10 - gfx10 golden updates and fixes - DCN support on POWER - GFXOFF for raven1 refresh - MM engine idle handlers cleanup - 10bpc EDP panel fixes - renoir watermark fixes - SR-IOV fixes - Arcturus VCN fixes - GDDR6 training fixes - freesync fixes - Pollock support amdkfd: - unify more codepath with amdgpu - use KIQ to setup HIQ rather than MMIO radeon: - fix vma fault handler race - PPC DMA fix - register check fixes for r100/r200 nouveau: - mmap_sem vs dma_resv fix - rewrite the ACR secure boot code for Turing - TU10x graphics engine support (TU11x pending) - Page kind mapping for turing - 10-bit LUT support - GP10B Tegra fixes - HD audio regression fix hisilicon/hibmc: - use generic fbdev code and helpers rockchip: - dsi/px30 support virtio: - fb damage support - static some functions vc4: - use dma_resv lock wrappers msm: - use dma_resv lock wrappers - sc7180 display + DSI support - a618 support - UBWC support improvements vmwgfx: - updates + new logging uapi exynos: - enable/disable callback cleanups etnaviv: - use dma_resv lock wrappers atmel-hlcdc: - clock fixes mediatek: - cmdq support - non-smooth cursor fixes - ctm property support sun4i: - suspend support - A64 mipi dsi support rcar-du: - Color management module support - LVDS encoder dual-link support - R8A77980 support analogic: - add support for an6345 ast: - atomic modeset support - primary plane garbage fix arcgpu: - fixes for fourcc handling tegra: - minor fixes and improvments mcde: - vblank support meson: - OSD1 plane AFBC commit gma500: - add pageflip support - reomve global drm_dev komeda: - tweak debugfs output - d32 support - runtime PM suppotr udl: - use generic shmem helpers - cleanup and fixes" * tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm: (1998 commits) drm/nouveau/fb/gp102-: allow module to load even when scrubber binary is missing drm/nouveau/acr: return error when registering LSF if ACR not supported drm/nouveau/disp/gv100-: not all channel types support reporting error codes drm/nouveau/disp/nv50-: prevent oops when no channel method map provided drm/nouveau: support synchronous pushbuf submission drm/nouveau: signal pending fences when channel has been killed drm/nouveau: reject attempts to submit to dead channels drm/nouveau: zero vma pointer even if we only unreference it rather than free drm/nouveau: Add HD-audio component notifier support drm/nouveau: fix build error without CONFIG_IOMMU_API drm/nouveau/kms/nv04: remove set but not used variable 'width' drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector' drm/nouveau/mmu: fix comptag memory leak drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc drm/nouveau/pmu/gm20b,gp10b: Fix Falcon bootstrapping drm/exynos: Rename Exynos to lowercase drm/exynos: change callback names drm/mst: Don't do atomic checks over disabled managers drm/amdgpu: add the lost mutex_init back drm/amd/display: skip opp blank or unblank if test pattern enabled ...
743 lines
17 KiB
C
743 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Copyright (C) 2015-2018 Etnaviv Project
|
|
*/
|
|
|
|
#include <linux/component.h>
|
|
#include <linux/dma-mapping.h>
|
|
#include <linux/module.h>
|
|
#include <linux/of_platform.h>
|
|
#include <linux/uaccess.h>
|
|
|
|
#include <drm/drm_debugfs.h>
|
|
#include <drm/drm_drv.h>
|
|
#include <drm/drm_file.h>
|
|
#include <drm/drm_ioctl.h>
|
|
#include <drm/drm_of.h>
|
|
#include <drm/drm_prime.h>
|
|
|
|
#include "etnaviv_cmdbuf.h"
|
|
#include "etnaviv_drv.h"
|
|
#include "etnaviv_gpu.h"
|
|
#include "etnaviv_gem.h"
|
|
#include "etnaviv_mmu.h"
|
|
#include "etnaviv_perfmon.h"
|
|
|
|
/*
|
|
* DRM operations:
|
|
*/
|
|
|
|
|
|
static void load_gpu(struct drm_device *dev)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ETNA_MAX_PIPES; i++) {
|
|
struct etnaviv_gpu *g = priv->gpu[i];
|
|
|
|
if (g) {
|
|
int ret;
|
|
|
|
ret = etnaviv_gpu_init(g);
|
|
if (ret)
|
|
priv->gpu[i] = NULL;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int etnaviv_open(struct drm_device *dev, struct drm_file *file)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct etnaviv_file_private *ctx;
|
|
int ret, i;
|
|
|
|
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
ctx->mmu = etnaviv_iommu_context_init(priv->mmu_global,
|
|
priv->cmdbuf_suballoc);
|
|
if (!ctx->mmu) {
|
|
ret = -ENOMEM;
|
|
goto out_free;
|
|
}
|
|
|
|
for (i = 0; i < ETNA_MAX_PIPES; i++) {
|
|
struct etnaviv_gpu *gpu = priv->gpu[i];
|
|
struct drm_gpu_scheduler *sched;
|
|
|
|
if (gpu) {
|
|
sched = &gpu->sched;
|
|
drm_sched_entity_init(&ctx->sched_entity[i],
|
|
DRM_SCHED_PRIORITY_NORMAL, &sched,
|
|
1, NULL);
|
|
}
|
|
}
|
|
|
|
file->driver_priv = ctx;
|
|
|
|
return 0;
|
|
|
|
out_free:
|
|
kfree(ctx);
|
|
return ret;
|
|
}
|
|
|
|
static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct etnaviv_file_private *ctx = file->driver_priv;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ETNA_MAX_PIPES; i++) {
|
|
struct etnaviv_gpu *gpu = priv->gpu[i];
|
|
|
|
if (gpu)
|
|
drm_sched_entity_destroy(&ctx->sched_entity[i]);
|
|
}
|
|
|
|
etnaviv_iommu_context_put(ctx->mmu);
|
|
|
|
kfree(ctx);
|
|
}
|
|
|
|
/*
|
|
* DRM debugfs:
|
|
*/
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
|
|
etnaviv_gem_describe_objects(priv, m);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m)
|
|
{
|
|
struct drm_printer p = drm_seq_file_printer(m);
|
|
|
|
read_lock(&dev->vma_offset_manager->vm_lock);
|
|
drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
|
|
read_unlock(&dev->vma_offset_manager->vm_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m)
|
|
{
|
|
struct drm_printer p = drm_seq_file_printer(m);
|
|
struct etnaviv_iommu_context *mmu_context;
|
|
|
|
seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev));
|
|
|
|
/*
|
|
* Lock the GPU to avoid a MMU context switch just now and elevate
|
|
* the refcount of the current context to avoid it disappearing from
|
|
* under our feet.
|
|
*/
|
|
mutex_lock(&gpu->lock);
|
|
mmu_context = gpu->mmu_context;
|
|
if (mmu_context)
|
|
etnaviv_iommu_context_get(mmu_context);
|
|
mutex_unlock(&gpu->lock);
|
|
|
|
if (!mmu_context)
|
|
return 0;
|
|
|
|
mutex_lock(&mmu_context->lock);
|
|
drm_mm_print(&mmu_context->mm, &p);
|
|
mutex_unlock(&mmu_context->lock);
|
|
|
|
etnaviv_iommu_context_put(mmu_context);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m)
|
|
{
|
|
struct etnaviv_cmdbuf *buf = &gpu->buffer;
|
|
u32 size = buf->size;
|
|
u32 *ptr = buf->vaddr;
|
|
u32 i;
|
|
|
|
seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n",
|
|
buf->vaddr, (u64)etnaviv_cmdbuf_get_pa(buf),
|
|
size - buf->user_size);
|
|
|
|
for (i = 0; i < size / 4; i++) {
|
|
if (i && !(i % 4))
|
|
seq_puts(m, "\n");
|
|
if (i % 4 == 0)
|
|
seq_printf(m, "\t0x%p: ", ptr + i);
|
|
seq_printf(m, "%08x ", *(ptr + i));
|
|
}
|
|
seq_puts(m, "\n");
|
|
}
|
|
|
|
static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m)
|
|
{
|
|
seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev));
|
|
|
|
mutex_lock(&gpu->lock);
|
|
etnaviv_buffer_dump(gpu, m);
|
|
mutex_unlock(&gpu->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int show_unlocked(struct seq_file *m, void *arg)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
int (*show)(struct drm_device *dev, struct seq_file *m) =
|
|
node->info_ent->data;
|
|
|
|
return show(dev, m);
|
|
}
|
|
|
|
static int show_each_gpu(struct seq_file *m, void *arg)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct etnaviv_gpu *gpu;
|
|
int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) =
|
|
node->info_ent->data;
|
|
unsigned int i;
|
|
int ret = 0;
|
|
|
|
for (i = 0; i < ETNA_MAX_PIPES; i++) {
|
|
gpu = priv->gpu[i];
|
|
if (!gpu)
|
|
continue;
|
|
|
|
ret = show(gpu, m);
|
|
if (ret < 0)
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct drm_info_list etnaviv_debugfs_list[] = {
|
|
{"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs},
|
|
{"gem", show_unlocked, 0, etnaviv_gem_show},
|
|
{ "mm", show_unlocked, 0, etnaviv_mm_show },
|
|
{"mmu", show_each_gpu, 0, etnaviv_mmu_show},
|
|
{"ring", show_each_gpu, 0, etnaviv_ring_show},
|
|
};
|
|
|
|
static int etnaviv_debugfs_init(struct drm_minor *minor)
|
|
{
|
|
struct drm_device *dev = minor->dev;
|
|
int ret;
|
|
|
|
ret = drm_debugfs_create_files(etnaviv_debugfs_list,
|
|
ARRAY_SIZE(etnaviv_debugfs_list),
|
|
minor->debugfs_root, minor);
|
|
|
|
if (ret) {
|
|
dev_err(dev->dev, "could not install etnaviv_debugfs_list\n");
|
|
return ret;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* DRM ioctls:
|
|
*/
|
|
|
|
static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct drm_etnaviv_param *args = data;
|
|
struct etnaviv_gpu *gpu;
|
|
|
|
if (args->pipe >= ETNA_MAX_PIPES)
|
|
return -EINVAL;
|
|
|
|
gpu = priv->gpu[args->pipe];
|
|
if (!gpu)
|
|
return -ENXIO;
|
|
|
|
return etnaviv_gpu_get_param(gpu, args->param, &args->value);
|
|
}
|
|
|
|
static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_etnaviv_gem_new *args = data;
|
|
|
|
if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED |
|
|
ETNA_BO_FORCE_MMU))
|
|
return -EINVAL;
|
|
|
|
return etnaviv_gem_new_handle(dev, file, args->size,
|
|
args->flags, &args->handle);
|
|
}
|
|
|
|
static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_etnaviv_gem_cpu_prep *args = data;
|
|
struct drm_gem_object *obj;
|
|
int ret;
|
|
|
|
if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC))
|
|
return -EINVAL;
|
|
|
|
obj = drm_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
ret = etnaviv_gem_cpu_prep(obj, args->op, &args->timeout);
|
|
|
|
drm_gem_object_put_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_etnaviv_gem_cpu_fini *args = data;
|
|
struct drm_gem_object *obj;
|
|
int ret;
|
|
|
|
if (args->flags)
|
|
return -EINVAL;
|
|
|
|
obj = drm_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
ret = etnaviv_gem_cpu_fini(obj);
|
|
|
|
drm_gem_object_put_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_etnaviv_gem_info *args = data;
|
|
struct drm_gem_object *obj;
|
|
int ret;
|
|
|
|
if (args->pad)
|
|
return -EINVAL;
|
|
|
|
obj = drm_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
ret = etnaviv_gem_mmap_offset(obj, &args->offset);
|
|
drm_gem_object_put_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_etnaviv_wait_fence *args = data;
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct drm_etnaviv_timespec *timeout = &args->timeout;
|
|
struct etnaviv_gpu *gpu;
|
|
|
|
if (args->flags & ~(ETNA_WAIT_NONBLOCK))
|
|
return -EINVAL;
|
|
|
|
if (args->pipe >= ETNA_MAX_PIPES)
|
|
return -EINVAL;
|
|
|
|
gpu = priv->gpu[args->pipe];
|
|
if (!gpu)
|
|
return -ENXIO;
|
|
|
|
if (args->flags & ETNA_WAIT_NONBLOCK)
|
|
timeout = NULL;
|
|
|
|
return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence,
|
|
timeout);
|
|
}
|
|
|
|
static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_etnaviv_gem_userptr *args = data;
|
|
|
|
if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) ||
|
|
args->flags == 0)
|
|
return -EINVAL;
|
|
|
|
if (offset_in_page(args->user_ptr | args->user_size) ||
|
|
(uintptr_t)args->user_ptr != args->user_ptr ||
|
|
(u32)args->user_size != args->user_size ||
|
|
args->user_ptr & ~PAGE_MASK)
|
|
return -EINVAL;
|
|
|
|
if (!access_ok((void __user *)(unsigned long)args->user_ptr,
|
|
args->user_size))
|
|
return -EFAULT;
|
|
|
|
return etnaviv_gem_new_userptr(dev, file, args->user_ptr,
|
|
args->user_size, args->flags,
|
|
&args->handle);
|
|
}
|
|
|
|
static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct drm_etnaviv_gem_wait *args = data;
|
|
struct drm_etnaviv_timespec *timeout = &args->timeout;
|
|
struct drm_gem_object *obj;
|
|
struct etnaviv_gpu *gpu;
|
|
int ret;
|
|
|
|
if (args->flags & ~(ETNA_WAIT_NONBLOCK))
|
|
return -EINVAL;
|
|
|
|
if (args->pipe >= ETNA_MAX_PIPES)
|
|
return -EINVAL;
|
|
|
|
gpu = priv->gpu[args->pipe];
|
|
if (!gpu)
|
|
return -ENXIO;
|
|
|
|
obj = drm_gem_object_lookup(file, args->handle);
|
|
if (!obj)
|
|
return -ENOENT;
|
|
|
|
if (args->flags & ETNA_WAIT_NONBLOCK)
|
|
timeout = NULL;
|
|
|
|
ret = etnaviv_gem_wait_bo(gpu, obj, timeout);
|
|
|
|
drm_gem_object_put_unlocked(obj);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int etnaviv_ioctl_pm_query_dom(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct drm_etnaviv_pm_domain *args = data;
|
|
struct etnaviv_gpu *gpu;
|
|
|
|
if (args->pipe >= ETNA_MAX_PIPES)
|
|
return -EINVAL;
|
|
|
|
gpu = priv->gpu[args->pipe];
|
|
if (!gpu)
|
|
return -ENXIO;
|
|
|
|
return etnaviv_pm_query_dom(gpu, args);
|
|
}
|
|
|
|
static int etnaviv_ioctl_pm_query_sig(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct etnaviv_drm_private *priv = dev->dev_private;
|
|
struct drm_etnaviv_pm_signal *args = data;
|
|
struct etnaviv_gpu *gpu;
|
|
|
|
if (args->pipe >= ETNA_MAX_PIPES)
|
|
return -EINVAL;
|
|
|
|
gpu = priv->gpu[args->pipe];
|
|
if (!gpu)
|
|
return -ENXIO;
|
|
|
|
return etnaviv_pm_query_sig(gpu, args);
|
|
}
|
|
|
|
static const struct drm_ioctl_desc etnaviv_ioctls[] = {
|
|
#define ETNA_IOCTL(n, func, flags) \
|
|
DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags)
|
|
ETNA_IOCTL(GET_PARAM, get_param, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_NEW, gem_new, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_INFO, gem_info, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_SUBMIT, gem_submit, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(WAIT_FENCE, wait_fence, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_USERPTR, gem_userptr, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(GEM_WAIT, gem_wait, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(PM_QUERY_DOM, pm_query_dom, DRM_RENDER_ALLOW),
|
|
ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW),
|
|
};
|
|
|
|
static const struct vm_operations_struct vm_ops = {
|
|
.fault = etnaviv_gem_fault,
|
|
.open = drm_gem_vm_open,
|
|
.close = drm_gem_vm_close,
|
|
};
|
|
|
|
static const struct file_operations fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = drm_open,
|
|
.release = drm_release,
|
|
.unlocked_ioctl = drm_ioctl,
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
.poll = drm_poll,
|
|
.read = drm_read,
|
|
.llseek = no_llseek,
|
|
.mmap = etnaviv_gem_mmap,
|
|
};
|
|
|
|
static struct drm_driver etnaviv_drm_driver = {
|
|
.driver_features = DRIVER_GEM | DRIVER_RENDER,
|
|
.open = etnaviv_open,
|
|
.postclose = etnaviv_postclose,
|
|
.gem_free_object_unlocked = etnaviv_gem_free_object,
|
|
.gem_vm_ops = &vm_ops,
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
.gem_prime_pin = etnaviv_gem_prime_pin,
|
|
.gem_prime_unpin = etnaviv_gem_prime_unpin,
|
|
.gem_prime_get_sg_table = etnaviv_gem_prime_get_sg_table,
|
|
.gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
|
|
.gem_prime_vmap = etnaviv_gem_prime_vmap,
|
|
.gem_prime_vunmap = etnaviv_gem_prime_vunmap,
|
|
.gem_prime_mmap = etnaviv_gem_prime_mmap,
|
|
#ifdef CONFIG_DEBUG_FS
|
|
.debugfs_init = etnaviv_debugfs_init,
|
|
#endif
|
|
.ioctls = etnaviv_ioctls,
|
|
.num_ioctls = DRM_ETNAVIV_NUM_IOCTLS,
|
|
.fops = &fops,
|
|
.name = "etnaviv",
|
|
.desc = "etnaviv DRM",
|
|
.date = "20151214",
|
|
.major = 1,
|
|
.minor = 3,
|
|
};
|
|
|
|
/*
|
|
* Platform driver:
|
|
*/
|
|
static int etnaviv_bind(struct device *dev)
|
|
{
|
|
struct etnaviv_drm_private *priv;
|
|
struct drm_device *drm;
|
|
int ret;
|
|
|
|
drm = drm_dev_alloc(&etnaviv_drm_driver, dev);
|
|
if (IS_ERR(drm))
|
|
return PTR_ERR(drm);
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
dev_err(dev, "failed to allocate private data\n");
|
|
ret = -ENOMEM;
|
|
goto out_put;
|
|
}
|
|
drm->dev_private = priv;
|
|
|
|
dev->dma_parms = &priv->dma_parms;
|
|
dma_set_max_seg_size(dev, SZ_2G);
|
|
|
|
mutex_init(&priv->gem_lock);
|
|
INIT_LIST_HEAD(&priv->gem_list);
|
|
priv->num_gpus = 0;
|
|
|
|
priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev);
|
|
if (IS_ERR(priv->cmdbuf_suballoc)) {
|
|
dev_err(drm->dev, "Failed to create cmdbuf suballocator\n");
|
|
ret = PTR_ERR(priv->cmdbuf_suballoc);
|
|
goto out_free_priv;
|
|
}
|
|
|
|
dev_set_drvdata(dev, drm);
|
|
|
|
ret = component_bind_all(dev, drm);
|
|
if (ret < 0)
|
|
goto out_destroy_suballoc;
|
|
|
|
load_gpu(drm);
|
|
|
|
ret = drm_dev_register(drm, 0);
|
|
if (ret)
|
|
goto out_unbind;
|
|
|
|
return 0;
|
|
|
|
out_unbind:
|
|
component_unbind_all(dev, drm);
|
|
out_destroy_suballoc:
|
|
etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
|
|
out_free_priv:
|
|
kfree(priv);
|
|
out_put:
|
|
drm_dev_put(drm);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void etnaviv_unbind(struct device *dev)
|
|
{
|
|
struct drm_device *drm = dev_get_drvdata(dev);
|
|
struct etnaviv_drm_private *priv = drm->dev_private;
|
|
|
|
drm_dev_unregister(drm);
|
|
|
|
component_unbind_all(dev, drm);
|
|
|
|
dev->dma_parms = NULL;
|
|
|
|
etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
|
|
|
|
drm->dev_private = NULL;
|
|
kfree(priv);
|
|
|
|
drm_dev_put(drm);
|
|
}
|
|
|
|
static const struct component_master_ops etnaviv_master_ops = {
|
|
.bind = etnaviv_bind,
|
|
.unbind = etnaviv_unbind,
|
|
};
|
|
|
|
static int compare_of(struct device *dev, void *data)
|
|
{
|
|
struct device_node *np = data;
|
|
|
|
return dev->of_node == np;
|
|
}
|
|
|
|
static int compare_str(struct device *dev, void *data)
|
|
{
|
|
return !strcmp(dev_name(dev), data);
|
|
}
|
|
|
|
static int etnaviv_pdev_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct component_match *match = NULL;
|
|
|
|
if (!dev->platform_data) {
|
|
struct device_node *core_node;
|
|
|
|
for_each_compatible_node(core_node, NULL, "vivante,gc") {
|
|
if (!of_device_is_available(core_node))
|
|
continue;
|
|
|
|
drm_of_component_match_add(&pdev->dev, &match,
|
|
compare_of, core_node);
|
|
}
|
|
} else {
|
|
char **names = dev->platform_data;
|
|
unsigned i;
|
|
|
|
for (i = 0; names[i]; i++)
|
|
component_match_add(dev, &match, compare_str, names[i]);
|
|
}
|
|
|
|
return component_master_add_with_match(dev, &etnaviv_master_ops, match);
|
|
}
|
|
|
|
static int etnaviv_pdev_remove(struct platform_device *pdev)
|
|
{
|
|
component_master_del(&pdev->dev, &etnaviv_master_ops);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver etnaviv_platform_driver = {
|
|
.probe = etnaviv_pdev_probe,
|
|
.remove = etnaviv_pdev_remove,
|
|
.driver = {
|
|
.name = "etnaviv",
|
|
},
|
|
};
|
|
|
|
static struct platform_device *etnaviv_drm;
|
|
|
|
static int __init etnaviv_init(void)
|
|
{
|
|
struct platform_device *pdev;
|
|
int ret;
|
|
struct device_node *np;
|
|
|
|
etnaviv_validate_init();
|
|
|
|
ret = platform_driver_register(&etnaviv_gpu_driver);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&etnaviv_platform_driver);
|
|
if (ret != 0)
|
|
goto unregister_gpu_driver;
|
|
|
|
/*
|
|
* If the DT contains at least one available GPU device, instantiate
|
|
* the DRM platform device.
|
|
*/
|
|
for_each_compatible_node(np, NULL, "vivante,gc") {
|
|
if (!of_device_is_available(np))
|
|
continue;
|
|
|
|
pdev = platform_device_alloc("etnaviv", -1);
|
|
if (!pdev) {
|
|
ret = -ENOMEM;
|
|
of_node_put(np);
|
|
goto unregister_platform_driver;
|
|
}
|
|
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
|
|
pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
|
|
|
|
/*
|
|
* Apply the same DMA configuration to the virtual etnaviv
|
|
* device as the GPU we found. This assumes that all Vivante
|
|
* GPUs in the system share the same DMA constraints.
|
|
*/
|
|
of_dma_configure(&pdev->dev, np, true);
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret) {
|
|
platform_device_put(pdev);
|
|
of_node_put(np);
|
|
goto unregister_platform_driver;
|
|
}
|
|
|
|
etnaviv_drm = pdev;
|
|
of_node_put(np);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
|
|
unregister_platform_driver:
|
|
platform_driver_unregister(&etnaviv_platform_driver);
|
|
unregister_gpu_driver:
|
|
platform_driver_unregister(&etnaviv_gpu_driver);
|
|
return ret;
|
|
}
|
|
module_init(etnaviv_init);
|
|
|
|
static void __exit etnaviv_exit(void)
|
|
{
|
|
platform_device_unregister(etnaviv_drm);
|
|
platform_driver_unregister(&etnaviv_platform_driver);
|
|
platform_driver_unregister(&etnaviv_gpu_driver);
|
|
}
|
|
module_exit(etnaviv_exit);
|
|
|
|
MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>");
|
|
MODULE_AUTHOR("Russell King <rmk+kernel@arm.linux.org.uk>");
|
|
MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>");
|
|
MODULE_DESCRIPTION("etnaviv DRM Driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:etnaviv");
|