Stephen Boyd c43a52cfd2 Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next ... * clk-aspeed: clk: aspeed: Handle inverse polarity of USB port 1 clock gate clk: aspeed: Fix return value check in aspeed_cc_init() clk: aspeed: Add reset controller clk: aspeed: Register gated clocks clk: aspeed: Add platform driver and register PLLs clk: aspeed: Register core clocks clk: Add clock driver for ASPEED BMC SoCs dt-bindings: clock: Add ASPEED constants * clk-lock-UP: clk: fix reentrancy of clk_enable() on UP systems * clk-mediatek: clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built clk: mediatek: Fix all warnings for missing struct clk_onecell_data clk: mediatek: fixup test-building of MediaTek clock drivers clk: mediatek: group drivers under indpendent menu * clk-allwinner: clk: sunxi-ng: a83t: Add M divider to TCON1 clock clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU clk: sunxi-ng: add support for Allwinner H3 DE2 CCU dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3 clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL clk: sunxi-ng: Support fixed post-dividers on NM style clocks clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks clk: sunxi-ng: Support fixed post-dividers on MP style clocks clk: sunxi: Use PTR_ERR_OR_ZERO()		2018-01-26 16:43:39 -08:00
..
clk-a10-codec.c	clk: sunxi: codec clock support	2015-10-21 21:51:28 +02:00
clk-a10-hosc.c	clk: sunxi: Remove CLK_IS_ROOT	2016-04-15 16:50:05 -07:00
clk-a10-mod1.c	clk: sunxi: mod1 clock should modify it's parent	2016-04-22 00:29:21 +02:00
clk-a10-pll2.c	clk: sunxi: pll2: Fix return value check in sun4i_pll2_setup()	2016-08-08 19:27:33 +02:00
clk-a10-ve.c	clk: sunxi: Make reset_control_ops const	2016-03-29 16:30:07 -07:00
clk-a20-gmac.c	clk: sunxi: Remove clk_register_clkdev calls	2016-02-11 20:05:47 +01:00
clk-factors.c	clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks	2018-01-04 15:13:24 -08:00
clk-factors.h	clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks	2018-01-04 15:13:24 -08:00
clk-mod0.c	clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks	2018-01-04 15:13:24 -08:00
clk-simple-gates.c	clk: sunxi: Add apb0 gates for H3	2016-02-25 11:30:32 -08:00
clk-sun4i-display.c	clk: sunxi: display: Add per-clock flags	2016-06-10 11:49:47 +02:00
clk-sun4i-pll3.c	clk: sunxi: Add PLL3 clock	2016-04-22 00:29:23 +02:00
clk-sun4i-tcon-ch1.c	clk: sunxi: remove unused variable	2016-06-16 09:18:29 +02:00
clk-sun6i-apb0-gates.c	clk: sunxi: make clk-* explicitly non-modular	2016-07-06 15:20:34 -07:00
clk-sun6i-apb0.c	clk: sunxi: make clk-* explicitly non-modular	2016-07-06 15:20:34 -07:00
clk-sun6i-ar100.c	clk: sunxi: make clk-* explicitly non-modular	2016-07-06 15:20:34 -07:00
clk-sun8i-apb0.c	clk: sunxi: Use PTR_ERR_OR_ZERO()	2017-11-30 16:34:09 +01:00
clk-sun8i-bus-gates.c	clk: sunxi: fix uninitialized access	2017-08-30 22:39:49 -07:00
clk-sun8i-mbus.c	clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks	2018-01-04 15:13:24 -08:00
clk-sun9i-core.c	clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks	2018-01-04 15:13:24 -08:00
clk-sun9i-cpus.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
clk-sun9i-mmc.c	clk: sunxi: explicitly request exclusive reset control	2017-11-01 22:54:55 -07:00
clk-sunxi.c	clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks	2018-01-04 15:13:24 -08:00
clk-usb.c	clk: sunxi: Make reset_control_ops const	2016-03-29 16:30:07 -07:00
Makefile	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00