c4860af88d
On Qualcomm platforms like SC8280XP and SA8540P, interconnect bandwidth
must be requested before enabling interconnect clocks.
Add basic support for managing an optional "pcie-mem" interconnect path
by setting a low constraint before enabling clocks and updating it after
the link is up.
Note that it is not possible for a controller driver to set anything but
a maximum peak bandwidth as expected average bandwidth will vary with
use case and actual use (and power policy?). This very much remains an
unresolved problem with the interconnect framework.
Also note that no constraint is set for the SC8280XP/SA8540P "cpu-pcie"
path for now as it is not clear what an appropriate constraint would be
(and the system does not crash when left unspecified).
Link: https://lore.kernel.org/r/20221102090705.23634-3-johan+linaro@kernel.org
Fixes:
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.. | ||
cadence | ||
dwc | ||
mobiveil | ||
Kconfig | ||
Makefile | ||
pci-aardvark.c | ||
pci-ftpci100.c | ||
pci-host-common.c | ||
pci-host-generic.c | ||
pci-hyperv-intf.c | ||
pci-hyperv.c | ||
pci-ixp4xx.c | ||
pci-loongson.c | ||
pci-mvebu.c | ||
pci-rcar-gen2.c | ||
pci-tegra.c | ||
pci-thunder-ecam.c | ||
pci-thunder-pem.c | ||
pci-v3-semi.c | ||
pci-versatile.c | ||
pci-xgene-msi.c | ||
pci-xgene.c | ||
pcie-altera-msi.c | ||
pcie-altera.c | ||
pcie-apple.c | ||
pcie-brcmstb.c | ||
pcie-hisi-error.c | ||
pcie-iproc-bcma.c | ||
pcie-iproc-msi.c | ||
pcie-iproc-platform.c | ||
pcie-iproc.c | ||
pcie-iproc.h | ||
pcie-mediatek-gen3.c | ||
pcie-mediatek.c | ||
pcie-microchip-host.c | ||
pcie-mt7621.c | ||
pcie-rcar-ep.c | ||
pcie-rcar-host.c | ||
pcie-rcar.c | ||
pcie-rcar.h | ||
pcie-rockchip-ep.c | ||
pcie-rockchip-host.c | ||
pcie-rockchip.c | ||
pcie-rockchip.h | ||
pcie-xilinx-cpm.c | ||
pcie-xilinx-nwl.c | ||
pcie-xilinx.c | ||
vmd.c |