94274f20f6
Convert the OPP v1 and v2 bindings to DT schema format. As the OPPv2 binding can be extended by vendors, we need to split the common part out from the "operating-points-v2" conforming compatible. Cc: Yangtao Li <tiny.windzz@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Maxime Ripard <mripard@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
57 lines
1.3 KiB
Plaintext
57 lines
1.3 KiB
Plaintext
Binding for NVIDIA Tegra20 CPUFreq
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==================================
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Required properties:
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- clocks: Must contain an entry for the CPU clock.
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See ../clocks/clock-bindings.txt for details.
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- operating-points-v2: See ../bindings/opp/opp-v2.yaml for details.
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- #cooling-cells: Should be 2. See ../thermal/thermal-cooling-devices.yaml for details.
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For each opp entry in 'operating-points-v2' table:
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- opp-supported-hw: Two bitfields indicating:
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On Tegra20:
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1. CPU process ID mask
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2. SoC speedo ID mask
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On Tegra30:
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1. CPU process ID mask
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2. CPU speedo ID mask
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A bitwise AND is performed against these values and if any bit
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matches, the OPP gets enabled.
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- opp-microvolt: CPU voltage triplet.
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Optional properties:
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- cpu-supply: Phandle to the CPU power supply.
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Example:
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regulators {
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cpu_reg: regulator0 {
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regulator-name = "vdd_cpu";
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};
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};
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cpu0_opp_table: opp_table0 {
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compatible = "operating-points-v2";
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opp@456000000 {
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clock-latency-ns = <125000>;
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opp-microvolt = <825000 825000 1125000>;
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opp-supported-hw = <0x03 0x0001>;
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opp-hz = /bits/ 64 <456000000>;
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};
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...
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};
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a9";
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clocks = <&tegra_car TEGRA20_CLK_CCLK>;
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operating-points-v2 = <&cpu0_opp_table>;
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cpu-supply = <&cpu_reg>;
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#cooling-cells = <2>;
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};
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};
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