c558e39e14
The driver consists of core, PCI, and platform parts. It would be better to split them into separate files. The platform driver is now called pwm-lpss-platform. Thus, previously set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe side since it seems no one from outside Intel is using it for now. While here, move to use macros module_pci_driver() and module_platform_driver(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> [thierry.reding: change select to depends on PWM_LPSS, cleanup] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
163 lines
3.9 KiB
C
163 lines
3.9 KiB
C
/*
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* Intel Low Power Subsystem PWM controller driver
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*
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* Copyright (C) 2014, Intel Corporation
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* Author: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Author: Chew Kean Ho <kean.ho.chew@intel.com>
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* Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
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* Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
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* Author: Alan Cox <alan@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include "pwm-lpss.h"
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#define PWM 0x00000000
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#define PWM_ENABLE BIT(31)
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#define PWM_SW_UPDATE BIT(30)
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#define PWM_BASE_UNIT_SHIFT 8
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#define PWM_BASE_UNIT_MASK 0x00ffff00
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#define PWM_ON_TIME_DIV_MASK 0x000000ff
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#define PWM_DIVISION_CORRECTION 0x2
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#define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION)
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#define NSECS_PER_SEC 1000000000UL
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struct pwm_lpss_chip {
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struct pwm_chip chip;
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void __iomem *regs;
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unsigned long clk_rate;
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};
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/* BayTrail */
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const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
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25000000
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};
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EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
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/* Braswell */
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const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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19200000
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};
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EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
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static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
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{
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return container_of(chip, struct pwm_lpss_chip, chip);
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}
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static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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u8 on_time_div;
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unsigned long c;
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unsigned long long base_unit, freq = NSECS_PER_SEC;
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u32 ctrl;
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do_div(freq, period_ns);
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/* The equation is: base_unit = ((freq / c) * 65536) + correction */
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base_unit = freq * 65536;
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c = lpwm->clk_rate;
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if (!c)
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return -EINVAL;
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do_div(base_unit, c);
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base_unit += PWM_DIVISION_CORRECTION;
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if (base_unit > PWM_LIMIT)
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return -EINVAL;
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if (duty_ns <= 0)
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duty_ns = 1;
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on_time_div = 255 - (255 * duty_ns / period_ns);
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ctrl = readl(lpwm->regs + PWM);
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ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
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ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT;
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ctrl |= on_time_div;
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/* request PWM to update on next cycle */
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ctrl |= PWM_SW_UPDATE;
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writel(ctrl, lpwm->regs + PWM);
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return 0;
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}
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static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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u32 ctrl;
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ctrl = readl(lpwm->regs + PWM);
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writel(ctrl | PWM_ENABLE, lpwm->regs + PWM);
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return 0;
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}
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static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_lpss_chip *lpwm = to_lpwm(chip);
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u32 ctrl;
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ctrl = readl(lpwm->regs + PWM);
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writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM);
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}
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static const struct pwm_ops pwm_lpss_ops = {
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.config = pwm_lpss_config,
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.enable = pwm_lpss_enable,
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.disable = pwm_lpss_disable,
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.owner = THIS_MODULE,
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};
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struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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const struct pwm_lpss_boardinfo *info)
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{
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struct pwm_lpss_chip *lpwm;
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int ret;
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lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
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if (!lpwm)
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return ERR_PTR(-ENOMEM);
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lpwm->regs = devm_ioremap_resource(dev, r);
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if (IS_ERR(lpwm->regs))
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return ERR_CAST(lpwm->regs);
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lpwm->clk_rate = info->clk_rate;
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lpwm->chip.dev = dev;
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lpwm->chip.ops = &pwm_lpss_ops;
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lpwm->chip.base = -1;
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lpwm->chip.npwm = 1;
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ret = pwmchip_add(&lpwm->chip);
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if (ret) {
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dev_err(dev, "failed to add PWM chip: %d\n", ret);
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return ERR_PTR(ret);
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}
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return lpwm;
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}
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EXPORT_SYMBOL_GPL(pwm_lpss_probe);
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int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
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{
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u32 ctrl;
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ctrl = readl(lpwm->regs + PWM);
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writel(ctrl & ~PWM_ENABLE, lpwm->regs + PWM);
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return pwmchip_remove(&lpwm->chip);
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}
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EXPORT_SYMBOL_GPL(pwm_lpss_remove);
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MODULE_DESCRIPTION("PWM driver for Intel LPSS");
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MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
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MODULE_LICENSE("GPL v2");
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