6529870cb0
On each sample, Monitor Mode Control Register A (MMCRA) content is
saved in pt_regs. MMCRA does not have a entry as-is in the pt_regs but
instead, MMCRA content is saved in the "dsisr" register of pt_regs.
Patch adds another entry to the perf_regs structure to include the
"MMCRA" printing which internally maps to the "dsisr" of pt_regs.
It also check for the MMCRA availability in the platform and present
value accordingly
mpe: This was the 2nd patch in a series with commit 333804dc3b7a
("powerpc/perf: Update perf_regs structure to include SIER") but I
accidentally only merged the 1st patch, so merge this one now.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
75 lines
2.1 KiB
C
75 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ARCH_PERF_REGS_H
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#define ARCH_PERF_REGS_H
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#include <stdlib.h>
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#include <linux/types.h>
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#include <asm/perf_regs.h>
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void perf_regs_load(u64 *regs);
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#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
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#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
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#ifdef __powerpc64__
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#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
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#else
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#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32
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#endif
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#define PERF_REG_IP PERF_REG_POWERPC_NIP
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#define PERF_REG_SP PERF_REG_POWERPC_R1
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static const char *reg_names[] = {
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[PERF_REG_POWERPC_R0] = "r0",
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[PERF_REG_POWERPC_R1] = "r1",
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[PERF_REG_POWERPC_R2] = "r2",
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[PERF_REG_POWERPC_R3] = "r3",
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[PERF_REG_POWERPC_R4] = "r4",
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[PERF_REG_POWERPC_R5] = "r5",
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[PERF_REG_POWERPC_R6] = "r6",
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[PERF_REG_POWERPC_R7] = "r7",
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[PERF_REG_POWERPC_R8] = "r8",
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[PERF_REG_POWERPC_R9] = "r9",
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[PERF_REG_POWERPC_R10] = "r10",
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[PERF_REG_POWERPC_R11] = "r11",
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[PERF_REG_POWERPC_R12] = "r12",
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[PERF_REG_POWERPC_R13] = "r13",
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[PERF_REG_POWERPC_R14] = "r14",
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[PERF_REG_POWERPC_R15] = "r15",
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[PERF_REG_POWERPC_R16] = "r16",
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[PERF_REG_POWERPC_R17] = "r17",
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[PERF_REG_POWERPC_R18] = "r18",
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[PERF_REG_POWERPC_R19] = "r19",
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[PERF_REG_POWERPC_R20] = "r20",
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[PERF_REG_POWERPC_R21] = "r21",
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[PERF_REG_POWERPC_R22] = "r22",
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[PERF_REG_POWERPC_R23] = "r23",
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[PERF_REG_POWERPC_R24] = "r24",
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[PERF_REG_POWERPC_R25] = "r25",
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[PERF_REG_POWERPC_R26] = "r26",
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[PERF_REG_POWERPC_R27] = "r27",
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[PERF_REG_POWERPC_R28] = "r28",
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[PERF_REG_POWERPC_R29] = "r29",
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[PERF_REG_POWERPC_R30] = "r30",
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[PERF_REG_POWERPC_R31] = "r31",
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[PERF_REG_POWERPC_NIP] = "nip",
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[PERF_REG_POWERPC_MSR] = "msr",
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[PERF_REG_POWERPC_ORIG_R3] = "orig_r3",
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[PERF_REG_POWERPC_CTR] = "ctr",
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[PERF_REG_POWERPC_LINK] = "link",
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[PERF_REG_POWERPC_XER] = "xer",
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[PERF_REG_POWERPC_CCR] = "ccr",
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[PERF_REG_POWERPC_SOFTE] = "softe",
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[PERF_REG_POWERPC_TRAP] = "trap",
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[PERF_REG_POWERPC_DAR] = "dar",
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[PERF_REG_POWERPC_DSISR] = "dsisr",
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[PERF_REG_POWERPC_SIER] = "sier",
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[PERF_REG_POWERPC_MMCRA] = "mmcra"
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};
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static inline const char *perf_reg_name(int id)
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{
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return reg_names[id];
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}
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#endif /* ARCH_PERF_REGS_H */
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