b8b47bfbe4
These patches rework the pci code for the sh architecture. Currently each board implements some kind of ioport to address mapping. Some boards use generic_io_base others try passing addresses as io ports. This is the first set of patches that try to unify the pci code as much as possible to avoid duplicated code. This will in the end lead to fewer lines board specific code and more generic code. This patch makes sure a struct pci_channel pointer is passed along to various pci functions such as pci_read_reg(), pci_write_reg(), pci_fixup_pcic(), sh7751_pcic_init() and sh7780_pcic_init(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/*
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* arch/sh/drivers/pci/fixups-lboxre2.c
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*
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* L-BOX RE2 PCI fixups
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*
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* Copyright (C) 2007 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/pci.h>
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#include "pci-sh4.h"
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#define PCIMCR_MRSET_OFF 0xBFFFFFFF
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#define PCIMCR_RFSH_OFF 0xFFFFFFFB
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int pci_fixup_pcic(struct pci_channel *chan)
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{
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unsigned long bcr1, mcr;
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bcr1 = ctrl_inl(SH7751_BCR1);
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bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
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pci_write_reg(chan, bcr1, SH4_PCIBCR1);
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/* Enable all interrupts, so we known what to fix */
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pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM);
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pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
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pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
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pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
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mcr = ctrl_inl(SH7751_MCR);
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mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
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pci_write_reg(chan, mcr, SH4_PCIMCR);
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pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
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pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
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pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
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pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
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return 0;
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}
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