Linus Torvalds c736c9a955 Only a couple new SoCs have support added this time, primarily for Qualcomm
SM8650 based on the diffstat. Otherwise this is a collection of non-critical
 fixes and cleanups to various clk drivers and their DT bindings. Nothing is
 changed in the core clk framework this time, although there's a patch to fix a
 basic clk type initialization function. In general, this pile looks to be on
 the smaller side.
 
 New Drivers:
  - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
  - Mediatek MT7988 SoC clocks
 
 Updates:
  - Update Zynqmp driver for Versal NET platforms
  - Add clk driver for Versal clocking wizard IP
  - Support for stm32mp25 clks
  - Add glitch free PLL setting support to si5351 clk driver
  - Add DSI clocks on Amlogic g12/sm1
  - Add CSI and ISP clocks on Amlogic g12/sm1
  - Document bindings for i.MX93 ANATOP clock driver
  - Free clk_node in i.MX SCU driver for resource with different owner
  - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
  - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
  - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
  - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S
  - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
  - Reuse reset functionality in the Renesas RZ/G2L clock driver
  - Global and RPMh clock support for the Qualcomm X1E80100 SoC
  - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
  - Add a new type of branch clock, with support for controlling separate
    memory control bits, to the Qualcomm clk driver
  - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and
    QRU1000
  - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
  - Add support for the camera clock controller on Qualcomm SC8280XP
  - Correct PLL configuration in GPU and video clock controllers for
    Qualcomm SM8150
  - Add runtime PM support and a few missing resets to Qualcomm SM8150
    video clock controller
  - Fix configuration of various GCC GDSCs on Qualcomm SM8550
  - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
  - Fix up GPU and display clock controllers PLL configuration settings
    on Qualcomm SM8550
  - Cleanup variable init in Allwinner nkm module
  - Convert various DT bindings to YAML
  - A few kernel-doc fixes for Samsung SoC clock controllers
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Only a couple new SoCs have support added this time, primarily for
  Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
  of non-critical fixes and cleanups to various clk drivers and their DT
  bindings.

  Nothing is changed in the core clk framework this time, although
  there's a patch to fix a basic clk type initialization function. In
  general, this pile looks to be on the smaller side.

  New Drivers:
   - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
   - Mediatek MT7988 SoC clocks

  Updates:
   - Update Zynqmp driver for Versal NET platforms
   - Add clk driver for Versal clocking wizard IP
   - Support for stm32mp25 clks
   - Add glitch free PLL setting support to si5351 clk driver
   - Add DSI clocks on Amlogic g12/sm1
   - Add CSI and ISP clocks on Amlogic g12/sm1
   - Document bindings for i.MX93 ANATOP clock driver
   - Free clk_node in i.MX SCU driver for resource with different owner
   - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
   - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
   - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
   - Add interrupt controller and Ethernet clocks and resets on Renesas
     RZ/G3S
   - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
   - Reuse reset functionality in the Renesas RZ/G2L clock driver
   - Global and RPMh clock support for the Qualcomm X1E80100 SoC
   - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
   - Add a new type of branch clock, with support for controlling
     separate memory control bits, to the Qualcomm clk driver
   - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
     and QRU1000
   - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
   - Add support for the camera clock controller on Qualcomm SC8280XP
   - Correct PLL configuration in GPU and video clock controllers for
     Qualcomm SM8150
   - Add runtime PM support and a few missing resets to Qualcomm SM8150
     video clock controller
   - Fix configuration of various GCC GDSCs on Qualcomm SM8550
   - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
   - Fix up GPU and display clock controllers PLL configuration settings
     on Qualcomm SM8550
   - Cleanup variable init in Allwinner nkm module
   - Convert various DT bindings to YAML
   - A few kernel-doc fixes for Samsung SoC clock controllers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  ...
2024-01-12 13:42:35 -08:00
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2024-01-11 10:07:29 -08:00
2022-09-28 09:02:20 +02:00
2022-10-10 12:00:45 -07:00
2024-01-12 13:32:30 -08:00

Linux kernel
============

There are several guides for kernel developers and users. These guides can
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In order to build the documentation, use ``make htmldocs`` or
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    https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.
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