Thomas Bogendoerfer c7c6b39050 [MIPS] Use correct dma flushing in dma_cache_sync()
Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
..
2007-11-28 01:24:04 +09:00
2007-11-26 19:15:31 -08:00
2008-01-28 13:21:30 +00:00
2008-01-28 10:36:02 +01:00
2007-10-20 01:24:05 +02:00
2008-01-25 21:08:34 +01:00