Dan Williams c7cf72dcad [ARM] xsc3: fix xsc3_l2_inv_range
When 'start' and 'end' are less than a cacheline apart and 'start' is
unaligned we are done after cleaning and invalidating the first
cacheline.  So check for (start < end) which will not walk off into
invalid address ranges when (start > end).

This issue was caught by drivers/dma/dmatest.

2.6.27 is susceptible.

Cc: <stable@kernel.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Lothar WaÃ<9f>mann <LW@KARO-electronics.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2008-11-06 10:48:29 -07:00
..
2008-11-06 10:48:29 -07:00
2008-10-31 23:37:57 +01:00
2008-11-01 09:49:46 -07:00
2008-10-20 08:52:41 -07:00
2008-10-31 16:29:20 +09:00