c7e4e0d7cc
This change set includes the PLL rate definition fixes and an addition of compile time PLL rate validation macros. It adds definitions of some missing clocks and extends the PLL rate tables required in the sound subsystem. In order to handle dependencies of clocks on the power domains a clock provider sub-driver is added for Exynos5 SoCs. In newer Exynos SoCs there is no need to do such things as the clocks/power domain relations are more clearly defined and better documented. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJaqsD/AAoJEE1bIKeAnHqL6T4P/1yQzJjN854/fjXlUQNyWhgg H+0d80LqrVjPY23UN2he9HDOUBgPEPML9nlZweZ/852flfs1TkvSqAugLjuFZVyU 7ypvqtZ7d//SLBlF4hIg9+P7S8dCn5wa2G+W348S+shH8YBiLKHUQE4Ii/gC8HOa LG1IMVwxdmtRiv638WbgXPM3Dp/P+Sm3mQmiycuTkwUnu3N2TvdcwEJLRwlKM8M5 yaNTwUKEA7ipAGBsvlFXV6Q22gaDyJdRH4HFtFzTg5FnBUC4wG4Uj1mWvU8N+qgD lStkQrrd6YfhM79s8AOz8Tx+7lSRjsMhI+8FiCFhgb4lt3i25uudZ645ZKIDoZaa qta2ijFZ6y8mpIN8VLK+J3xa9YUIaYgUX/s1hcKvob1ZHBchVwkE4iu3dwaGXd30 540dZOygX7pxUr8S1YBYJ/8If/fkHHssxuZTnT9YFhpHH9H2K1m4dJuwpDwCeekn 1YN3205YTBoZtqoBff/C7JjtUKFtAqFXIjgX3o+0Wx/KxbM1TCXwCfT4vTadWSpA 0G5SsP+/2JH5WsMn2r6GLOM+2b0wR0v2/IUkxeu15fp8GuIXWVfyxPmgQ1UAvuJx oFu4WWr/mSBJeJ8vcYbzfLkiFuqmKwLxWnueElUeh+wL2NoefpdL9uE/F0tXhzSJ +8qJHGhBhuvF6YAwoto/ =mUDp -----END PGP SIGNATURE----- Merge tag 'clk-v4.17-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-samsung Pull samsung clk driver updates from Sylwester Nawrocki: This change set includes the PLL rate definition fixes and an addition of compile time PLL rate validation macros. It adds definitions of some missing clocks and extends the PLL rate tables required in the sound subsystem. In order to handle dependencies of clocks on the power domains a clock provider sub-driver is added for Exynos5 SoCs. In newer Exynos SoCs there is no need to do such things as the clocks/power domain relations are more clearly defined and better documented. * tag 'clk-v4.17-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk: (21 commits) clk: samsung: Add fout=196608001 Hz EPLL rate entry for exynos4412 clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devices clk: samsung: exynos5420: Add more entries to EPLL rate table clk: samsung: exynos5420: Add CLK_SET_RATE_PARENT flag to mout_mau_epll_clk clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU clk: samsung: Add Exynos5 sub-CMU clock driver soc: samsung: pm_domains: Add blacklisting clock handling clk: samsung: Add compile time PLL rate validators clk: samsung: s3c2410: Fix PLL rates clk: samsung: exynos7: Fix PLL rates clk: samsung: exynos5433: Fix PLL rates clk: samsung: exynos5260: Fix PLL rates clk: samsung: exynos5250: Fix PLL rates clk: samsung: exynos3250: Fix PLL rates clk: exynos5433: Extend list of available AUD_PLL output frequencies clk: exynos5433: Add CLK_IGNORE_UNUSED flag to sclk_ioclk_i2s1_bclk clk: samsung: Add a git tree entry to MAINTAINERS clk: samsung: Remove redundant dev_err call in exynos_audss_clk_probe() clk: samsung: Remove redundant dev_err call in exynos5433_cmu_probe() ... |
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| include | ||
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| .cocciconfig | ||
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| README | ||
Linux kernel ============ This file was moved to Documentation/admin-guide/README.rst Please notice that there are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. In order to build the documentation, use ``make htmldocs`` or ``make pdfdocs``. There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation. See Documentation/00-INDEX for a list of what is contained in each file. Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.