c88d591089
The problem with wake_idle() is that is doesn't respect things like
cpu_power, which means it doesn't deal well with SMT nor the recent
RT interaction.
To cure this, it needs to do what sched_balance_self() does, which
leads to the possibility of merging select_task_rq_fair() and
sched_balance_self().
Modify sched_balance_self() to:
- update_shares() when walking up the domain tree,
(it only called it for the top domain, but it should
have done this anyway), which allows us to remove
this ugly bit from try_to_wake_up().
- do wake_affine() on the smallest domain that contains
both this (the waking) and the prev (the wakee) cpu for
WAKE invocations.
Then use the top-down balance steps it had to replace wake_idle().
This leads to the dissapearance of SD_WAKE_BALANCE and
SD_WAKE_IDLE_FAR, with SD_WAKE_IDLE replaced with SD_BALANCE_WAKE.
SD_WAKE_AFFINE needs SD_BALANCE_WAKE to be effective.
Touch all topology bits to replace the old with new SD flags --
platforms might need re-tuning, enabling SD_BALANCE_WAKE
conditionally on a NUMA distance seems like a good additional
feature, magny-core and small nehalem systems would want this
enabled, systems with slow interconnects would not.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
123 lines
3.2 KiB
C
123 lines
3.2 KiB
C
/*
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* Copyright (C) 2002, Erich Focht, NEC
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _ASM_IA64_TOPOLOGY_H
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#define _ASM_IA64_TOPOLOGY_H
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#include <asm/acpi.h>
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#include <asm/numa.h>
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#include <asm/smp.h>
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#ifdef CONFIG_NUMA
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/* Nodes w/o CPUs are preferred for memory allocations, see build_zonelists */
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#define PENALTY_FOR_NODE_WITH_CPUS 255
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/*
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* Distance above which we begin to use zone reclaim
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*/
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#define RECLAIM_DISTANCE 15
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/*
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* Returns the number of the node containing CPU 'cpu'
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*/
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#define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu])
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/*
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* Returns a bitmask of CPUs on Node 'node'.
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*/
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#define node_to_cpumask(node) (node_to_cpu_mask[node])
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#define cpumask_of_node(node) (&node_to_cpu_mask[node])
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/*
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* Returns the number of the node containing Node 'nid'.
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* Not implemented here. Multi-level hierarchies detected with
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* the help of node_distance().
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*/
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#define parent_node(nid) (nid)
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/*
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* Determines the node for a given pci bus
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*/
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#define pcibus_to_node(bus) PCI_CONTROLLER(bus)->node
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void build_cpu_to_node_map(void);
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#define SD_CPU_INIT (struct sched_domain) { \
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.parent = NULL, \
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.child = NULL, \
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.groups = NULL, \
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.min_interval = 1, \
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.max_interval = 4, \
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.busy_factor = 64, \
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.imbalance_pct = 125, \
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.cache_nice_tries = 2, \
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.busy_idx = 2, \
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.idle_idx = 1, \
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.newidle_idx = 2, \
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.wake_idx = 1, \
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.forkexec_idx = 1, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_NEWIDLE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_WAKE \
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| SD_WAKE_AFFINE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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.nr_balance_failed = 0, \
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}
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/* sched_domains SD_NODE_INIT for IA64 NUMA machines */
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#define SD_NODE_INIT (struct sched_domain) { \
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.parent = NULL, \
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.child = NULL, \
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.groups = NULL, \
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.min_interval = 8, \
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.max_interval = 8*(min(num_online_cpus(), 32U)), \
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.busy_factor = 64, \
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.imbalance_pct = 125, \
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.cache_nice_tries = 2, \
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.busy_idx = 3, \
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.idle_idx = 2, \
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.newidle_idx = 2, \
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.wake_idx = 1, \
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.forkexec_idx = 1, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_FORK \
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| SD_BALANCE_WAKE \
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| SD_SERIALIZE, \
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.last_balance = jiffies, \
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.balance_interval = 64, \
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.nr_balance_failed = 0, \
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}
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#endif /* CONFIG_NUMA */
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#ifdef CONFIG_SMP
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#define topology_physical_package_id(cpu) (cpu_data(cpu)->socket_id)
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#define topology_core_id(cpu) (cpu_data(cpu)->core_id)
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#define topology_core_siblings(cpu) (cpu_core_map[cpu])
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#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
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#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
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#define topology_thread_cpumask(cpu) (&per_cpu(cpu_sibling_map, cpu))
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#define smt_capable() (smp_num_siblings > 1)
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#endif
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extern void arch_fix_phys_package_id(int num, u32 slot);
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#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \
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cpu_all_mask : \
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cpumask_of_node(pcibus_to_node(bus)))
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#include <asm-generic/topology.h>
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#endif /* _ASM_IA64_TOPOLOGY_H */
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