This driver is for a newer generation of MediaTek MT7615 4x4 802.11ac PCIe-based chipsets, which support wave2 MU-MIMO up to 4 users/group and also support up to 160MHz bandwidth. The driver fully supports AP, station and monitor mode. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Roy Luo <royluo@google.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
230 lines
5.8 KiB
C
230 lines
5.8 KiB
C
// SPDX-License-Identifier: ISC
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/* Copyright (C) 2019 MediaTek Inc.
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*
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* Author: Roy Luo <royluo@google.com>
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* Ryder Lee <ryder.lee@mediatek.com>
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* Felix Fietkau <nbd@nbd.name>
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*/
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#include <linux/etherdevice.h>
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#include "mt7615.h"
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#include "mac.h"
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static void mt7615_phy_init(struct mt7615_dev *dev)
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{
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/* disable band 0 rf low power beacon mode */
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mt76_rmw(dev, MT_WF_PHY_WF2_RFCTRL0, MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN,
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MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
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}
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static void mt7615_mac_init(struct mt7615_dev *dev)
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{
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/* enable band 0 clk */
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mt76_rmw(dev, MT_CFG_CCR,
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MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN,
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MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN);
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mt76_rmw_field(dev, MT_TMAC_CTCR0,
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MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
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mt76_rmw_field(dev, MT_TMAC_CTCR0,
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MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
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mt76_rmw(dev, MT_TMAC_CTCR0,
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MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
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MT_TMAC_CTCR0_INS_DDLMT_EN,
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MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
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MT_TMAC_CTCR0_INS_DDLMT_EN);
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mt7615_mcu_set_rts_thresh(dev, 0x92b);
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mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
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MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
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mt7615_mcu_init_mac(dev);
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mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP |
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FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072));
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mt76_wr(dev, MT_AGG_ARUCR, FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7));
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mt76_wr(dev, MT_AGG_ARDCR,
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 0) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(1),
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max_t(int, 0, MT7615_RATE_RETRY - 2)) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
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FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
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mt76_wr(dev, MT_AGG_ARCR,
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(MT_AGG_ARCR_INIT_RATE1 |
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FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
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MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
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FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
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FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)));
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dev->mt76.global_wcid.idx = MT7615_WTBL_RESERVED;
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dev->mt76.global_wcid.hw_key_idx = -1;
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rcu_assign_pointer(dev->mt76.wcid[MT7615_WTBL_RESERVED],
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&dev->mt76.global_wcid);
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}
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static int mt7615_init_hardware(struct mt7615_dev *dev)
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{
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int ret;
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mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
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spin_lock_init(&dev->token_lock);
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idr_init(&dev->token);
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ret = mt7615_eeprom_init(dev);
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if (ret < 0)
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return ret;
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ret = mt7615_dma_init(dev);
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if (ret)
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return ret;
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set_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
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ret = mt7615_mcu_init(dev);
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if (ret)
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return ret;
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mt7615_mcu_set_eeprom(dev);
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mt7615_mac_init(dev);
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mt7615_phy_init(dev);
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mt7615_mcu_ctrl_pm_state(dev, 0);
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mt7615_mcu_del_wtbl_all(dev);
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return 0;
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}
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#define CCK_RATE(_idx, _rate) { \
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.bitrate = _rate, \
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.flags = IEEE80211_RATE_SHORT_PREAMBLE, \
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.hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
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.hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \
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}
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#define OFDM_RATE(_idx, _rate) { \
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.bitrate = _rate, \
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.hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
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.hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
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}
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static struct ieee80211_rate mt7615_rates[] = {
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CCK_RATE(0, 10),
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CCK_RATE(1, 20),
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CCK_RATE(2, 55),
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CCK_RATE(3, 110),
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OFDM_RATE(11, 60),
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OFDM_RATE(15, 90),
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OFDM_RATE(10, 120),
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OFDM_RATE(14, 180),
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OFDM_RATE(9, 240),
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OFDM_RATE(13, 360),
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OFDM_RATE(8, 480),
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OFDM_RATE(12, 540),
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};
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static const struct ieee80211_iface_limit if_limits[] = {
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{
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.max = MT7615_MAX_INTERFACES,
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.types = BIT(NL80211_IFTYPE_AP) |
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BIT(NL80211_IFTYPE_STATION)
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}
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};
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static const struct ieee80211_iface_combination if_comb[] = {
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{
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.limits = if_limits,
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.n_limits = ARRAY_SIZE(if_limits),
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.max_interfaces = 4,
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.num_different_channels = 1,
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.beacon_int_infra_match = true,
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}
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};
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static int mt7615_init_debugfs(struct mt7615_dev *dev)
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{
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struct dentry *dir;
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dir = mt76_register_debugfs(&dev->mt76);
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if (!dir)
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return -ENOMEM;
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return 0;
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}
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int mt7615_register_device(struct mt7615_dev *dev)
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{
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struct ieee80211_hw *hw = mt76_hw(dev);
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struct wiphy *wiphy = hw->wiphy;
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int ret;
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ret = mt7615_init_hardware(dev);
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if (ret)
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return ret;
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INIT_DELAYED_WORK(&dev->mt76.mac_work, mt7615_mac_work);
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hw->queues = 4;
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hw->max_rates = 3;
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hw->max_report_rates = 7;
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hw->max_rate_tries = 11;
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hw->sta_data_size = sizeof(struct mt7615_sta);
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hw->vif_data_size = sizeof(struct mt7615_vif);
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wiphy->iface_combinations = if_comb;
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wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
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ieee80211_hw_set(hw, SUPPORTS_REORDERING_BUFFER);
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ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
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dev->mt76.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
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dev->mt76.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
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dev->mt76.sband_5g.sband.vht_cap.cap |=
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IEEE80211_VHT_CAP_SHORT_GI_160 |
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IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
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IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
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IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
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dev->mt76.chainmask = 0x404;
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dev->mt76.antenna_mask = 0xf;
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wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
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BIT(NL80211_IFTYPE_AP);
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ret = mt76_register_device(&dev->mt76, true, mt7615_rates,
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ARRAY_SIZE(mt7615_rates));
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if (ret)
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return ret;
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hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
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return mt7615_init_debugfs(dev);
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}
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void mt7615_unregister_device(struct mt7615_dev *dev)
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{
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struct mt76_txwi_cache *txwi;
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int id;
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spin_lock_bh(&dev->token_lock);
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idr_for_each_entry(&dev->token, txwi, id) {
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mt7615_txp_skb_unmap(&dev->mt76, txwi);
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if (txwi->skb)
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dev_kfree_skb_any(txwi->skb);
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mt76_put_txwi(&dev->mt76, txwi);
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}
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spin_unlock_bh(&dev->token_lock);
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idr_destroy(&dev->token);
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mt76_unregister_device(&dev->mt76);
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mt7615_mcu_exit(dev);
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mt7615_dma_cleanup(dev);
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ieee80211_free_hw(mt76_hw(dev));
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}
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