Dave Jiang c99b2e8cf7 cxl: update names for interleave ways conversion macros ... Change names for interleave ways macros to clearly indicate which variable is encoded and which is the actual ways value. ways == interleave ways eiw == encoded interleave ways Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/167027516228.3124679.11265039496968588580.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2022-12-05 18:17:16 -08:00
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core	cxl: update names for interleave ways conversion macros	2022-12-05 18:17:16 -08:00
acpi.c	cxl: update names for interleave ways conversion macros	2022-12-05 18:17:16 -08:00
cxl.h	cxl: update names for interleave ways conversion macros	2022-12-05 18:17:16 -08:00
cxlmem.h	Merge branch 'for-6.2/cxl-aer' into for-6.2/cxl	2022-12-05 12:31:30 -08:00
cxlpci.h	cxl/core/regs: Make cxl_map_{component, device}_regs() device generic	2022-12-03 13:40:16 -08:00
Kconfig	cxl/region: Manage CPU caches relative to DPA invalidation events	2022-12-03 00:03:57 -08:00
Makefile	cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation	2022-11-30 16:30:47 -08:00
mem.c	cxl/port: Add RCD endpoint port enumeration	2022-12-05 10:32:26 -08:00
pci.c	Merge branch 'for-6.2/cxl-aer' into for-6.2/cxl	2022-12-05 12:31:30 -08:00
pmem.c	Merge branch 'for-6.2/cxl-security' into for-6.2/cxl	2022-12-05 12:30:38 -08:00
port.c	cxl/port: Read CDAT table	2022-07-19 15:38:05 -07:00
security.c	cxl/region: Manage CPU caches relative to DPA invalidation events	2022-12-03 00:03:57 -08:00