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According to the HDA spec, we must write 1 to bit 15 on a CORBRP
reset, read back 1, then write 0, then read back 0. This must be
done while the DMA is not running.
We accidentaly ended up writing back the 0 by using a writel
instead of a writew to CORBWP.
This caused occasional controller failure on Bay Trail hardware.
[replaced error messages with dev_err() by tiwai]
Signed-off-by: David Henningsson <david.henningsson@canonical.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
ca460f8652