linux/include/soc
Nicolas Saenz Julienne ca91ddef2e soc: bcm2835: Add notify xHCI reset property
The property is needed in order to trigger VL805's firmware load. Note
that gap between the property introduced and the previous one is due to
the properties not being defined.

Link: https://lore.kernel.org/r/20200505161318.26200-2-nsaenzjulienne@suse.de
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2020-05-13 10:53:23 +01:00
..
arc ARCv2: IDU-intc: Add support for edge-triggered interrupts 2019-08-26 22:34:59 +05:30
at91 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
bcm2835 soc: bcm2835: Add notify xHCI reset property 2020-05-13 10:53:23 +01:00
brcmstb treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
fsl soc: fsl: qe: fix sparse warnings for ucc_slow.c 2020-03-24 19:09:40 -05:00
imx treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
mediatek iommu/mediatek: Clean up struct mtk_smi_iommu 2019-08-30 15:57:27 +02:00
mscc net: dsa: felix: add port policers 2020-03-30 11:44:00 -07:00
nps soc: Support for NPS HW scheduling 2016-11-30 11:54:25 -08:00
qcom drivers: qcom: rpmh: remove rpmh_flush export 2020-02-11 22:15:02 -08:00
rockchip treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive riscv: move sifive_l2_cache.h to include/soc 2020-01-12 10:12:44 -08:00
tegra ARM: SoC updates 2020-04-03 15:02:35 -07:00