cb16b91a44
Commit 877c685607925238e302cd3aa38788dca6c1b226
("perf: Remove include of cgroup.h from perf_event.h") caused
this build failure if PERF_EVENTS is enabled:
In file included from arch/s390/include/asm/perf_event.h:9:0,
from include/linux/perf_event.h:24,
from kernel/events/ring_buffer.c:12:
arch/s390/include/asm/cpu_mf.h: In function 'qctri':
arch/s390/include/asm/cpu_mf.h:61:12: error: 'EINVAL' undeclared (first use in this function)
cpu_mf.h had an implicit errno.h dependency, which was added
indirectly via cgroups.h but not anymore. Add it explicitly.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Tested-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Li Zefan <lizefan@huawei.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Link: http://lkml.kernel.org/r/51385F79.7000106@huawei.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
103 lines
2.5 KiB
C
103 lines
2.5 KiB
C
/*
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* CPU-measurement facilities
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*
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* Copyright IBM Corp. 2012
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* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License (version 2 only)
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* as published by the Free Software Foundation.
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*/
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#ifndef _ASM_S390_CPU_MF_H
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#define _ASM_S390_CPU_MF_H
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#include <linux/errno.h>
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#include <asm/facility.h>
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#define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
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#define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
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#define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
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#define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
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#define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
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#define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
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#define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
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#define CPU_MF_INT_RI_HALTED (1 << 5) /* run-time instr. halted */
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#define CPU_MF_INT_RI_BUF_FULL (1 << 4) /* run-time instr. program
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buffer full */
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#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
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#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
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CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
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CPU_MF_INT_SF_LSDA)
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#define CPU_MF_INT_RI_MASK (CPU_MF_INT_RI_HALTED|CPU_MF_INT_RI_BUF_FULL)
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/* CPU measurement facility support */
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static inline int cpum_cf_avail(void)
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{
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return MACHINE_HAS_SPP && test_facility(67);
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}
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static inline int cpum_sf_avail(void)
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{
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return MACHINE_HAS_SPP && test_facility(68);
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}
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struct cpumf_ctr_info {
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u16 cfvn;
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u16 auth_ctl;
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u16 enable_ctl;
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u16 act_ctl;
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u16 max_cpu;
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u16 csvn;
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u16 max_cg;
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u16 reserved1;
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u32 reserved2[12];
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} __packed;
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/* Query counter information */
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static inline int qctri(struct cpumf_ctr_info *info)
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{
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int rc = -EINVAL;
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asm volatile (
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"0: .insn s,0xb28e0000,%1\n"
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"1: lhi %0,0\n"
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"2:\n"
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EX_TABLE(1b, 2b)
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: "+d" (rc), "=Q" (*info));
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return rc;
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}
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/* Load CPU-counter-set controls */
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static inline int lcctl(u64 ctl)
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{
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int cc;
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asm volatile (
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" .insn s,0xb2840000,%1\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc) : "m" (ctl) : "cc");
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return cc;
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}
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/* Extract CPU counter */
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static inline int ecctr(u64 ctr, u64 *val)
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{
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register u64 content asm("4") = 0;
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int cc;
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asm volatile (
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" .insn rre,0xb2e40000,%0,%2\n"
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" ipm %1\n"
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" srl %1,28\n"
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: "=d" (content), "=d" (cc) : "d" (ctr) : "cc");
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if (!cc)
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*val = content;
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return cc;
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}
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#endif /* _ASM_S390_CPU_MF_H */
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