linux/arch/x86/events/intel
Kan Liang cbea56395c perf/x86/cstate: Add Rocket Lake CPU support
From the perspective of Intel cstate residency counters, Rocket Lake is
the same as Ice Lake and Tiger Lake. Share the code with them. Update
the comments for Rocket Lake.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201019153528.13850-2-kan.liang@linux.intel.com
2020-10-29 11:00:40 +01:00
..
bts.c perf/x86: Replace zero-length array with flexible-array 2020-05-19 20:34:16 +02:00
core.c perf/x86/intel: Add Rocket Lake CPU support 2020-10-29 11:00:39 +01:00
cstate.c perf/x86/cstate: Add Rocket Lake CPU support 2020-10-29 11:00:40 +01:00
ds.c perf/x86/intel: Support PERF_SAMPLE_DATA_PAGE_SIZE 2020-10-29 11:00:38 +01:00
knc.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
lbr.c perf/x86/intel/lbr: Support XSAVES for arch LBR read 2020-07-08 11:38:57 +02:00
Makefile perf/x86/rapl: Move RAPL support to common x86 code 2020-05-28 07:58:55 +02:00
p4.c perf_event: Add support for LSM and SELinux checks 2019-10-17 21:31:55 +02:00
p6.c x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping 2018-02-15 01:15:52 +01:00
pt.c perf/x86/intel/pt: Drop pointless NULL assignment. 2020-04-30 20:14:36 +02:00
pt.h perf/x86/intel/pt: Prevent redundant WRMSRs 2019-11-13 11:06:18 +01:00
uncore_nhmex.c perf/x86/intel/uncore: Correct fixed counter index check for NHM 2018-05-31 12:36:28 +02:00
uncore_snb.c perf/x86/intel/uncore: Reduce the number of CBOX counters 2020-09-29 09:57:01 +02:00
uncore_snbep.c perf/x86/intel/uncore: Fix the scale of the IMC free-running events 2020-09-29 09:57:02 +02:00
uncore.c perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore support 2020-09-29 09:57:00 +02:00
uncore.h perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore support 2020-09-29 09:57:00 +02:00