6df9d38f91
Implements genpd and reset providers for downstream devices. Each instance of the driver binds to a single register and represents a single SoC power domain. The driver does not currently implement all features (clockgate-only state, misc flags), but we declare the respective registers for documentation purposes. These features will be added as they become useful for downstream devices. This also creates the apple/soc tree and Kconfig submenu. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Hector Martin <marcan@marcan.st>
23 lines
513 B
Plaintext
23 lines
513 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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if ARCH_APPLE || COMPILE_TEST
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menu "Apple SoC drivers"
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config APPLE_PMGR_PWRSTATE
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tristate "Apple SoC PMGR power state control"
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depends on PM
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select REGMAP
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select MFD_SYSCON
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select PM_GENERIC_DOMAINS
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select RESET_CONTROLLER
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default ARCH_APPLE
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help
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The PMGR block in Apple SoCs provides high-level power state
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controls for SoC devices. This driver manages them through the
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generic power domain framework, and also provides reset support.
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endmenu
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endif
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