Aneesh Kumar K.V ccf17c8b5c powerpc/mm/hugetlb: Handle hugepage size supported by hash config ...

W.r.t hash page table config, we support 16MB and 16GB as the hugepage
size. Update the hstate_get_psize to handle 16M and 16G.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

2016-11-28 22:34:48 +11:00

..

hash-4k.h

powerpc/64: get rid of MIN_HUGEPTE_SHIFT

2016-11-18 22:40:37 +11:00

hash-64k.h

powerpc/64: get rid of MIN_HUGEPTE_SHIFT

2016-11-18 22:40:37 +11:00

hash.h

powerpc/mm: vmalloc abstraction in preparation for radix

2016-05-11 21:53:53 +10:00

hugetlb.h

powerpc/mm/hugetlb: Handle hugepage size supported by hash config

2016-11-28 22:34:48 +11:00

mmu-hash.h

powerpc/64: Simplify adaptation to new ISA v3.00 HPTE format

2016-11-16 15:43:25 +11:00

mmu.h

powerpc/mm: Move register_process_table() out of ppc_md

2016-08-04 20:22:34 +10:00

pgalloc.h

powerpc fixes for 4.7 #4

2016-06-25 06:01:48 -07:00

pgtable-4k.h

powerpc/mm: use _raw variant of page table accessors

2016-07-17 16:42:51 +10:00

pgtable-64k.h

powerpc/mm: use _raw variant of page table accessors

2016-07-17 16:42:51 +10:00

pgtable.h

powerpc: Fix usage of _PAGE_RO in hugepage

2016-09-23 07:54:22 +10:00

radix-4k.h

powerpc/mm/radix: Add radix pte #defines

2016-05-01 18:32:52 +10:00

radix-64k.h

powerpc/mm/radix: Add radix pte #defines

2016-05-01 18:32:52 +10:00

radix.h

powerpc/mm/radix: Use different pte update sequence for different POWER9 revs

2016-09-13 17:37:10 +10:00

tlbflush-hash.h

powerpc/mm: remove flush_tlb_page_nohash

2016-08-01 11:15:13 +10:00

tlbflush-radix.h

powerpc/mm: Add radix flush all with IS=3

2016-09-23 07:54:18 +10:00

tlbflush.h

powerpc/mm: remove flush_tlb_page_nohash

2016-08-01 11:15:13 +10:00