cd1e64935f
The ISA states: "when ACC[i] contains defined data, the contents of VSRs
4×i to 4×i+3 are undefined until either a VSX Move From ACC instruction
is used to copy the contents of ACC[i] to VSRs 4×i to 4×i+3 or some other
instruction directly writes to one of these VSRs." We aren't doing this.
This test only works on Power10 because the hardware implementation
happens to map ACC0 to VSRs 0-3, but will fail on any other implementation
that doesn't do this. So add xxmfacc between writing to the accumulator
and accessing the VSRs.
Fixes:
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.. | ||
crypto/chacha20-s390 | ||
cxl | ||
fault-injection | ||
ktest | ||
kunit | ||
memblock | ||
nvdimm | ||
radix-tree | ||
scatterlist | ||
selftests | ||
vsock |