3d82904559
This patch introduces the main part of Cadence USBSSP DRD driver to Linux kernel. To reduce the patch size a little bit, the header file gadget.h was intentionally added as separate patch. The Cadence USBSSP DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA platform. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS DRD controller is compliant with XHCI. The architecture for device side is almost the same as for host side, and most of the XHCI specification can be used to understand how this controller operates. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
255 lines
5.6 KiB
C
255 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Cadence PCI Glue driver.
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*
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* Copyright (C) 2019 Cadence.
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*
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* Author: Pawel Laszczak <pawell@cadence.com>
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include "core.h"
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#include "gadget-export.h"
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#define PCI_BAR_HOST 0
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#define PCI_BAR_OTG 0
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#define PCI_BAR_DEV 2
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#define PCI_DEV_FN_HOST_DEVICE 0
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#define PCI_DEV_FN_OTG 1
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#define PCI_DRIVER_NAME "cdns-pci-usbssp"
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#define PLAT_DRIVER_NAME "cdns-usbssp"
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#define CDNS_VENDOR_ID 0x17cd
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#define CDNS_DEVICE_ID 0x0100
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#define CDNS_DRD_IF (PCI_CLASS_SERIAL_USB << 8 | 0x80)
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static struct pci_dev *cdnsp_get_second_fun(struct pci_dev *pdev)
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{
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struct pci_dev *func;
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/*
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* Gets the second function.
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* It's little tricky, but this platform has two function.
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* The fist keeps resources for Host/Device while the second
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* keeps resources for DRD/OTG.
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*/
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func = pci_get_device(pdev->vendor, pdev->device, NULL);
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if (!func)
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return NULL;
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if (func->devfn == pdev->devfn) {
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func = pci_get_device(pdev->vendor, pdev->device, func);
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if (!func)
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return NULL;
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}
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return func;
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}
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static int cdnsp_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct device *dev = &pdev->dev;
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struct pci_dev *func;
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struct resource *res;
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struct cdns *cdnsp;
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int ret;
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/*
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* For GADGET/HOST PCI (devfn) function number is 0,
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* for OTG PCI (devfn) function number is 1.
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*/
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if (!id || (pdev->devfn != PCI_DEV_FN_HOST_DEVICE &&
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pdev->devfn != PCI_DEV_FN_OTG))
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return -EINVAL;
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func = cdnsp_get_second_fun(pdev);
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if (!func)
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return -EINVAL;
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if (func->class == PCI_CLASS_SERIAL_USB_XHCI ||
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pdev->class == PCI_CLASS_SERIAL_USB_XHCI) {
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ret = -EINVAL;
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goto put_pci;
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}
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ret = pcim_enable_device(pdev);
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if (ret) {
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dev_err(&pdev->dev, "Enabling PCI device has failed %d\n", ret);
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goto put_pci;
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}
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pci_set_master(pdev);
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if (pci_is_enabled(func)) {
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cdnsp = pci_get_drvdata(func);
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} else {
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cdnsp = kzalloc(sizeof(*cdnsp), GFP_KERNEL);
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if (!cdnsp) {
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ret = -ENOMEM;
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goto disable_pci;
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}
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}
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/* For GADGET device function number is 0. */
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if (pdev->devfn == 0) {
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resource_size_t rsrc_start, rsrc_len;
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/* Function 0: host(BAR_0) + device(BAR_1).*/
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dev_dbg(dev, "Initialize resources\n");
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rsrc_start = pci_resource_start(pdev, PCI_BAR_DEV);
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rsrc_len = pci_resource_len(pdev, PCI_BAR_DEV);
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res = devm_request_mem_region(dev, rsrc_start, rsrc_len, "dev");
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if (!res) {
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dev_dbg(dev, "controller already in use\n");
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ret = -EBUSY;
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goto free_cdnsp;
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}
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cdnsp->dev_regs = devm_ioremap(dev, rsrc_start, rsrc_len);
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if (!cdnsp->dev_regs) {
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dev_dbg(dev, "error mapping memory\n");
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ret = -EFAULT;
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goto free_cdnsp;
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}
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cdnsp->dev_irq = pdev->irq;
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dev_dbg(dev, "USBSS-DEV physical base addr: %pa\n",
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&rsrc_start);
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res = &cdnsp->xhci_res[0];
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res->start = pci_resource_start(pdev, PCI_BAR_HOST);
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res->end = pci_resource_end(pdev, PCI_BAR_HOST);
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res->name = "xhci";
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res->flags = IORESOURCE_MEM;
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dev_dbg(dev, "USBSS-XHCI physical base addr: %pa\n",
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&res->start);
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/* Interrupt for XHCI, */
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res = &cdnsp->xhci_res[1];
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res->start = pdev->irq;
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res->name = "host";
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res->flags = IORESOURCE_IRQ;
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} else {
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res = &cdnsp->otg_res;
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res->start = pci_resource_start(pdev, PCI_BAR_OTG);
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res->end = pci_resource_end(pdev, PCI_BAR_OTG);
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res->name = "otg";
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res->flags = IORESOURCE_MEM;
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dev_dbg(dev, "CDNSP-DRD physical base addr: %pa\n",
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&res->start);
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/* Interrupt for OTG/DRD. */
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cdnsp->otg_irq = pdev->irq;
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}
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if (pci_is_enabled(func)) {
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cdnsp->dev = dev;
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cdnsp->gadget_init = cdnsp_gadget_init;
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ret = cdns_init(cdnsp);
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if (ret)
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goto free_cdnsp;
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}
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pci_set_drvdata(pdev, cdnsp);
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device_wakeup_enable(&pdev->dev);
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if (pci_dev_run_wake(pdev))
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pm_runtime_put_noidle(&pdev->dev);
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return 0;
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free_cdnsp:
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if (!pci_is_enabled(func))
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kfree(cdnsp);
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disable_pci:
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pci_disable_device(pdev);
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put_pci:
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pci_dev_put(func);
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return ret;
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}
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static void cdnsp_pci_remove(struct pci_dev *pdev)
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{
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struct cdns *cdnsp;
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struct pci_dev *func;
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func = cdnsp_get_second_fun(pdev);
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cdnsp = (struct cdns *)pci_get_drvdata(pdev);
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if (pci_dev_run_wake(pdev))
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pm_runtime_get_noresume(&pdev->dev);
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if (!pci_is_enabled(func)) {
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kfree(cdnsp);
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goto pci_put;
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}
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cdns_remove(cdnsp);
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pci_put:
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pci_dev_put(func);
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}
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static int __maybe_unused cdnsp_pci_suspend(struct device *dev)
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{
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struct cdns *cdns = dev_get_drvdata(dev);
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return cdns_suspend(cdns);
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}
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static int __maybe_unused cdnsp_pci_resume(struct device *dev)
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{
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struct cdns *cdns = dev_get_drvdata(dev);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&cdns->lock, flags);
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ret = cdns_resume(cdns, 1);
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spin_unlock_irqrestore(&cdns->lock, flags);
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return ret;
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}
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static const struct dev_pm_ops cdnsp_pci_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(cdnsp_pci_suspend, cdnsp_pci_resume)
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};
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static const struct pci_device_id cdnsp_pci_ids[] = {
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{ PCI_VENDOR_ID_CDNS, CDNS_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_SERIAL_USB_DEVICE, PCI_ANY_ID },
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{ PCI_VENDOR_ID_CDNS, CDNS_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
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CDNS_DRD_IF, PCI_ANY_ID },
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{ 0, }
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};
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static struct pci_driver cdnsp_pci_driver = {
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.name = "cdnsp-pci",
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.id_table = &cdnsp_pci_ids[0],
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.probe = cdnsp_pci_probe,
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.remove = cdnsp_pci_remove,
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.driver = {
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.pm = &cdnsp_pci_pm_ops,
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}
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};
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module_pci_driver(cdnsp_pci_driver);
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MODULE_DEVICE_TABLE(pci, cdnsp_pci_ids);
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MODULE_ALIAS("pci:cdnsp");
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MODULE_AUTHOR("Pawel Laszczak <pawell@cadence.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Cadence CDNSP PCI driver");
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