Paulo Zanoni cf6c525a31 drm/i915/gen9: fix plane_blocks_per_line on watermarks calculations ... The confusing thing is that plane_blocks_per_line is listed as part of the method 2 calculation but is also used for other things. We calculated it in two different places and different ways: one inside skl_wm_method2() and the other inside skl_compute_plane_wm(). The skl_wm_method2() implementation is the one that matches the specification. With this patch we fix the skl_compute_plane_wm() calculation and just pass it as a parameter to skl_wm_method2(). We also take care to not modify the value of plane_bytes_per_line since we're going to rely on it having a correct value in later patches. This should affect the watermarks for Linear and Y-tiled. From my analysis, it looks like the two plane_blocks_per_line variables got out of sync on 0fda65680e, but we can't really say that commit was a regression, it looks like just an incomplete fix. There's always the possibility that 0fda65680e matched our specification at that time, and then later the specification changed. v2: Try to add a "Fixes" tag (Maarten). Fixes: 0fda65680e ("drm/i915/skl: Update watermarks for Y tiling") Cc: stable@vger.kernel.org Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Lyude <cpaul@redhat.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1474578035-424-7-git-send-email-paulo.r.zanoni@intel.com (cherry picked from commit 7a1a8aed67) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2016-10-10 16:06:39 +03:00
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drm	drm/i915/gen9: fix plane_blocks_per_line on watermarks calculations	2016-10-10 16:06:39 +03:00
host1x	drm/tegra: dsi: Enhance runtime power management	2016-08-24 15:58:57 +02:00
ipu-v3	gpu: ipu-v3: Add queued image conversion support	2016-09-19 08:30:27 +02:00
vga	vgaarbiter: rst-ifiy and polish kerneldoc	2016-08-16 18:49:56 +02:00
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