d76fb40637
Move the posted interrupt pre/post_block logic into vcpu_put/load respectively, using the kvm_vcpu_is_blocking() to determining whether or not the wakeup handler needs to be set (and unset). This avoids updating the PI descriptor if halt-polling is successful, reduces the number of touchpoints for updating the descriptor, and eliminates the confusing behavior of intentionally leaving a "stale" PI.NDST when a blocking vCPU is scheduled back in after preemption. The downside is that KVM will do the PID update twice if the vCPU is preempted after prepare_to_rcuwait() but before schedule(), but that's a rare case (and non-existent on !PREEMPT kernels). The notable wart is the need to send a self-IPI on the wakeup vector if an outstanding notification is pending after configuring the wakeup vector. Ideally, KVM would just do a kvm_vcpu_wake_up() in this case, but the scheduler doesn't support waking a task from its preemption notifier callback, i.e. while the task is right in the middle of being scheduled out. Note, setting the wakeup vector before halt-polling is not necessary: once the pending IRQ will be recorded in the PIR, kvm_vcpu_has_events() will detect this (via kvm_cpu_get_interrupt(), kvm_apic_get_interrupt(), apic_has_interrupt_for_ppr() and finally vmx_sync_pir_to_irr()) and terminate the polling. Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20211208015236.1616697-5-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
105 lines
2.5 KiB
C
105 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __KVM_X86_VMX_POSTED_INTR_H
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#define __KVM_X86_VMX_POSTED_INTR_H
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#define POSTED_INTR_ON 0
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#define POSTED_INTR_SN 1
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/* Posted-Interrupt Descriptor */
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struct pi_desc {
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u32 pir[8]; /* Posted interrupt requested */
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union {
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struct {
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/* bit 256 - Outstanding Notification */
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u16 on : 1,
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/* bit 257 - Suppress Notification */
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sn : 1,
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/* bit 271:258 - Reserved */
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rsvd_1 : 14;
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/* bit 279:272 - Notification Vector */
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u8 nv;
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/* bit 287:280 - Reserved */
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u8 rsvd_2;
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/* bit 319:288 - Notification Destination */
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u32 ndst;
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};
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u64 control;
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};
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u32 rsvd[6];
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} __aligned(64);
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static inline bool pi_test_and_set_on(struct pi_desc *pi_desc)
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{
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return test_and_set_bit(POSTED_INTR_ON,
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(unsigned long *)&pi_desc->control);
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}
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static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc)
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{
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return test_and_clear_bit(POSTED_INTR_ON,
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(unsigned long *)&pi_desc->control);
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}
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static inline bool pi_test_and_clear_sn(struct pi_desc *pi_desc)
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{
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return test_and_clear_bit(POSTED_INTR_SN,
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(unsigned long *)&pi_desc->control);
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}
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static inline bool pi_test_and_set_pir(int vector, struct pi_desc *pi_desc)
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{
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return test_and_set_bit(vector, (unsigned long *)pi_desc->pir);
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}
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static inline bool pi_is_pir_empty(struct pi_desc *pi_desc)
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{
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return bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS);
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}
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static inline void pi_set_sn(struct pi_desc *pi_desc)
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{
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set_bit(POSTED_INTR_SN,
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(unsigned long *)&pi_desc->control);
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}
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static inline void pi_set_on(struct pi_desc *pi_desc)
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{
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set_bit(POSTED_INTR_ON,
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(unsigned long *)&pi_desc->control);
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}
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static inline void pi_clear_on(struct pi_desc *pi_desc)
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{
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clear_bit(POSTED_INTR_ON,
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(unsigned long *)&pi_desc->control);
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}
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static inline void pi_clear_sn(struct pi_desc *pi_desc)
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{
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clear_bit(POSTED_INTR_SN,
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(unsigned long *)&pi_desc->control);
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}
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static inline bool pi_test_on(struct pi_desc *pi_desc)
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{
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return test_bit(POSTED_INTR_ON,
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(unsigned long *)&pi_desc->control);
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}
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static inline bool pi_test_sn(struct pi_desc *pi_desc)
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{
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return test_bit(POSTED_INTR_SN,
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(unsigned long *)&pi_desc->control);
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}
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void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu);
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void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu);
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void pi_wakeup_handler(void);
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void __init pi_init_cpu(int cpu);
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bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu);
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int pi_update_irte(struct kvm *kvm, unsigned int host_irq, uint32_t guest_irq,
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bool set);
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void vmx_pi_start_assignment(struct kvm *kvm);
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#endif /* __KVM_X86_VMX_POSTED_INTR_H */
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