d021f5c5ff
Reading TMC mode register without proper coresight power
management can lead to exceptions like the one in the call
trace below in tmc_read_unprepare_etb() when the trace data
is read after the sink is disabled. So fix this by having
a check for coresight sysfs mode before reading TMC mode
management register in tmc_read_unprepare_etb() similar to
tmc_read_prepare_etb().
SError Interrupt on CPU6, code 0xbe000411 -- SError
pstate: 80400089 (Nzcv daIf +PAN -UAO)
pc : tmc_read_unprepare_etb+0x74/0x108
lr : tmc_read_unprepare_etb+0x54/0x108
sp : ffffff80d9507c30
x29: ffffff80d9507c30 x28: ffffff80b3569a0c
x27: 0000000000000000 x26: 00000000000a0001
x25: ffffff80cbae9550 x24: 0000000000000010
x23: ffffffd07296b0f0 x22: ffffffd0109ee028
x21: 0000000000000000 x20: ffffff80d19e70e0
x19: ffffff80d19e7080 x18: 0000000000000000
x17: 0000000000000000 x16: 0000000000000000
x15: 0000000000000000 x14: 0000000000000000
x13: 0000000000000000 x12: 0000000000000000
x11: 0000000000000000 x10: dfffffd000000001
x9 : 0000000000000000 x8 : 0000000000000002
x7 : ffffffd071d0fe78 x6 : 0000000000000000
x5 : 0000000000000080 x4 : 0000000000000001
x3 : ffffffd071d0fe98 x2 : 0000000000000000
x1 : 0000000000000004 x0 : 0000000000000001
Kernel panic - not syncing: Asynchronous SError Interrupt
Fixes:
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.. | ||
coresight-catu.c | ||
coresight-catu.h | ||
coresight-cpu-debug.c | ||
coresight-cti-platform.c | ||
coresight-cti-sysfs.c | ||
coresight-cti.c | ||
coresight-cti.h | ||
coresight-etb10.c | ||
coresight-etm3x-sysfs.c | ||
coresight-etm3x.c | ||
coresight-etm4x-sysfs.c | ||
coresight-etm4x.c | ||
coresight-etm4x.h | ||
coresight-etm-cp14.c | ||
coresight-etm-perf.c | ||
coresight-etm-perf.h | ||
coresight-etm.h | ||
coresight-funnel.c | ||
coresight-platform.c | ||
coresight-priv.h | ||
coresight-replicator.c | ||
coresight-stm.c | ||
coresight-sysfs.c | ||
coresight-tmc-etf.c | ||
coresight-tmc-etr.c | ||
coresight-tmc.c | ||
coresight-tmc.h | ||
coresight-tpiu.c | ||
coresight.c | ||
Kconfig | ||
Makefile |