Atsushi Nemoto d10e025f0e MIPS: TXx9: Cache fixup
TX39/TX49 can enable/disable I/D cache at runtime.  Add kernel options
to control them.  This is useful to debug some cache-related issues,
such as aliasing or I/D coherency.  Also enable CWF bit for TX49 SoCs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-11 16:18:42 +01:00
..
2008-08-01 13:03:49 -07:00
2008-10-11 16:18:42 +01:00
2008-10-01 09:40:43 -07:00
2008-07-26 12:00:09 -07:00